Performance analysis of Tunnel Field Effect Transistor using charge plasma concept

2014 IEEE International Conference on Electron Devices and Solid-State Circuits ◽

10.1109/edssc.2014.7061239 ◽

2014 ◽

Author(s):

Ishu Agrawal ◽

P.N Kondekar

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Charge Plasma ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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Design and Analog Performance Analysis of Charge-Plasma Based Cylindrical GAA Silicon Nanowire Tunnel Field Effect Transistor

Silicon ◽

10.1007/s12633-019-00355-7 ◽

2019 ◽

Vol 12 (11) ◽

pp. 2627-2634 ◽

Author(s):

Naveen Kumar ◽

Ashish Raman

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Silicon Nanowire ◽

Charge Plasma ◽

Analog Performance ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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Performance Analysis of Charge Plasma Based Five Layered Black Phosphorus-Silicon Heterostructure Tunnel Field Effect Transistor

Silicon ◽

10.1007/s12633-020-00376-7 ◽

2020 ◽

Vol 12 (12) ◽

pp. 2809-2817 ◽

Author(s):

Prateek Kumar ◽

Maneesha Gupta ◽

Kunwar Singh

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Black Phosphorus ◽

Charge Plasma ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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Design and Analog/RF Performance Analysis of a Novel Symmetric Raised-Channel SiGe Heterojunction Tunnel Field-Effect Transistor (TFET)

Silicon ◽

10.1007/s12633-021-01113-4 ◽

2021 ◽

Author(s):

Sourav Guha ◽

Prithviraj Pachal

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Effect Transistor ◽

Tunnel Field Effect Transistor ◽

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Performance Analysis of HfO2-SiO2 Stacked Oxide Quadruple Gate Tunnel Field Effect Transistor for Improved ON Current

Silicon ◽

10.1007/s12633-021-01394-9 ◽

2021 ◽

Author(s):

M. Sathishkumar ◽

T. S. Arun Samuel ◽

P. Vimala ◽

D. Nirmal

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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Performance Analysis of Double Gated GaAs-Ge Based Hetero Tunnel Field Effect Transistor

2020 6th International Conference on Signal Processing and Communication (ICSC) ◽

10.1109/icsc48311.2020.9182722 ◽

2020 ◽

Author(s):

Dharmender Nishad ◽

Kaushal Nigam ◽

Vinay Anand Tikkiwal ◽

Satyendra Kumar

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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Device and circuit level performance analysis of novel InAs/Si heterojunction double gate tunnel field effect transistor

Superlattices and Microstructures ◽

10.1016/j.spmi.2016.04.008 ◽

2016 ◽

Vol 94 ◽

pp. 119-130 ◽

Author(s):

S. Ahish ◽

Dheeraj Sharma ◽

M.H. Vasantha ◽

Y.B.N. Kumar

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Double Gate ◽

Effect Transistor ◽

Tunnel Field Effect Transistor ◽

Level Performance

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Performance analysis of InGaAs/GaAsP heterojunction double gate tunnel field effect transistor

Superlattices and Microstructures ◽

10.1016/j.spmi.2017.01.014 ◽

2017 ◽

Vol 103 ◽

pp. 93-101 ◽

Author(s):

S. Ahish ◽

Dheeraj Sharma ◽

M.H. Vasantha ◽

Y.B.N. Kumar

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Double Gate ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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New subthreshold performance analysis of germanium based dual halo gate stacked triple material surrounding gate tunnel field effect transistor

Superlattices and Microstructures ◽

10.1016/j.spmi.2019.05.016 ◽

2019 ◽

Vol 130 ◽

pp. 485-498 ◽

Author(s):

M. Venkatesh ◽

N.B. Balamurugan

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Surrounding Gate ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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Performance Analysis of Group IV Material Based Tunnel Field Effect Transistor: Effect of Drain Splitting and Introducing Ge-Strip at Source- Channel Junction

Silicon ◽

10.1007/s12633-020-00824-4 ◽

2020 ◽

Author(s):

Surender Kumar ◽

Rajesh Mehra ◽

Harsh Yadav ◽

Rikmantra Basu

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Group Iv ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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Performance Analysis of Double Gate Heterojunction Tunnel Field Effect Transistor

2019 International Conference on Cutting-edge Technologies in Engineering (ICon-CuTE) ◽

10.1109/icon-cute47290.2019.8991467 ◽

2019 ◽

Author(s):

Irfan Ahmad Pindoo ◽

Sanjeet K. Sinha ◽

Suman Lata Tripathi

Keyword(s):

Performance Analysis ◽

Field Effect ◽

Field Effect Transistor ◽

Double Gate ◽

Effect Transistor ◽

Tunnel Field Effect Transistor

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