Simultaneous switching, noise, and reliability analyses of VLSI core logic

Author(s):  
I.N. Hajj
2017 ◽  
Vol 2017 ◽  
pp. 1-10 ◽  
Author(s):  
Khaoula Ait Belaid ◽  
Hassan Belahrach ◽  
Hassan Ayad

The paper studies a simultaneous switching noise (SSN) in a power distribution network (PDN) with dual supply voltages and two cores. This is achieved by reducing the admittance matrix Y of the PDN then calculating frequency domain impedance with rational function approximation using vector fitting. This paper presents a method of computing the simultaneous switching noise through a switching current, whose properties and details are described. Thus, the results are discussed and performed using MATLAB and PSpice tools. It demonstrated that the presence of many cores in the same PCB influences the SSN due to electromagnetic coupling.


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