Closed-loop control of virtual FPGA-coded permanent magnet synchronous motor drives using a rapidly prototyped controller

2008 ◽  
Author(s):  
Christian Dufour ◽  
Vincent Lapointe ◽  
Jean Belanger ◽  
Simon Abourida
Keyword(s):  
Permanent Magnet ◽  
Closed Loop ◽  
Permanent Magnet Synchronous Motor ◽  
Synchronous Motor ◽  
Motor Drives ◽  
Closed Loop Control ◽  
Loop Control ◽  
Synchronous Motor Drives

Design of Permanent Magnet Synchronous Motor Control Chip Based on SOPC

2014 ◽  
Vol 654 ◽  
pp. 203-207
Author(s):  
Peng Fei Chen ◽  
Yue Nan Zeng ◽  
Zu Qun Peng ◽  
Li Zhi Wu
Keyword(s):  
Permanent Magnet ◽  
Closed Loop ◽  
Permanent Magnet Synchronous Motor ◽  
Synchronous Motor ◽  
Closed Loop Control ◽  
Chip Design ◽  
Loop Control ◽  
Design Flexibility ◽  
Fpga Chip ◽  
Ip Reuse

This article presents a program for permanent magnet synchronous motor (PMSM) vector control chip design based on SOPC technology. Microprocessor NIOSII and hardware arithmetic unit such as CORDIC and SVPWM, were all integrated in a FPGA by using bus interconnect and IP reuse technology, so that became a dedicated control chip of PMSM. Using hardware and software co-design methods, the chip was designed on Altera's CycloneIII FPGA, chip design flexibility and use small resource. Finally, combined with the power driver board achieved the dual closed-loop control of PMSM. The results show that system have a good performance, which proved that system can be well controlled by the designed IC.

scholarly journals FPGA-Based Controller for a Permanent-Magnet Synchronous Motor Drive Based on a Four-Level Active-Clamped DC-AC Converter

Energies ◽  
2018 ◽  
Vol 11 (10) ◽  
pp. 2639 ◽  
Author(s):  
Joan Nicolas-Apruzzese ◽  
Emili Lupon ◽  
Sergio Busquets-Monge ◽  
Alfonso Conesa ◽  
Josep Bordonau ◽  
...  
Keyword(s):  
Permanent Magnet ◽  
Closed Loop ◽  
Permanent Magnet Synchronous Motor ◽  
Synchronous Motor ◽  
Operating Conditions ◽  
Motor Drive ◽  
Closed Loop Control ◽  
Fpga Design ◽  
Loop Control ◽  
Clamped Converter

This paper proposes a closed-loop control implementation fully-embedded into an FPGA for a permanent-magnet synchronous motor (PMSM) drive based on a four-level active-clamped converter. The proposed FPGA controller comprises a field-oriented control to drive the PMSM, a DC-link voltage balancing closed-loop control (VBC), and a virtual-vector-based modulator for a four-level active-clamped converter. The VBC and the modulator operate in consonance to preserve the DC-link capacitor voltages balanced. The FPGA design methodology is carefully described and the main aspects to achieve an optimal FPGA implementation using low resources are discussed. Experimental results under different operating conditions are presented to demonstrate the good performance and the feasibility of the proposed controller for motor-drive applications.

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