Passive model-order reduction of RLC circuits with embedded time-delay descriptor systems
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2020 ◽
Vol 51
(12)
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pp. 2134-2149
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2011 ◽
Vol 32
(4)
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pp. 1399-1421
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2012 ◽
Vol 20
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pp. 865-877
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1999 ◽
Vol 22
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pp. 356-364
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