309-µW 40-MHz 20-dB-Gain Analog Filter in 28nm-CMOS

Author(s):  
Marcello De Matteis ◽  
Andrea Baschirotto ◽  
Elia A. Vallicelli
Keyword(s):  
2014 ◽  
Vol 568-570 ◽  
pp. 1020-1025
Author(s):  
Zhuo Wei Jiang ◽  
Chun Ming Gao

In view of badly transplanting of analog filter and low cost performance of digital filter for the washing out signal methods used by dynamic simulator, this paper proposed a computer intelligent time domain method. We decompose signal with the computer intelligence in the time domain, and convert the signal into the corresponding movement form respectively, then get the final result by overlaying them. The experimental results show that this method not only can achieve the effect of the traditional methods, better portability and faster computation speed, but also can be achieved directly on general computers.


Author(s):  
Hampus Malmberg ◽  
Georg Wilckens ◽  
Hans-Andrea Loeliger

AbstractA control-bounded analog-to-digital converter consists of a linear analog system that is subject to digital control, and a digital filter that estimates the analog input signal from the digital control signals. Such converters have many commonalities with delta–sigma converters, but they can use more general analog filters. The paper describes the operating principle, gives a transfer function analysis, and describes the digital filtering. In addition, the paper discusses two examples of such architectures. The first example is a cascade structure reminiscent of, but simpler than, a high-order MASH converter. The second example combines two attractive properties that have so far been considered incompatible. Its nominal conversion noise (assuming ideal components) essentially equals that of the first example. However, its analog filter is a fully connected network to which the input signal is fed in parallel, which potentially makes it more robust against nonidealities.


2008 ◽  
Vol 17 (06) ◽  
pp. 1161-1172 ◽  
Author(s):  
HUA-PIN CHEN ◽  
KUO-HSIUNG WU

A new voltage-mode biquad with four inputs and four outputs using only two differential difference current conveyors (DDCCs), two grounded capacitors, and two resistors is proposed. The proposed circuit can act as a multifunction voltage-mode filter with one or three inputs and four outputs and can perform simultaneous realization of voltage-mode notch, highpass, bandpass, and lowpass filter signals from the four output terminals, respectively, without any component choice conditions. On the other hand, it also can act as a universal voltage-mode filter with four inputs and a single output and can realize five generic voltage-mode filter signals from the same configuration without any component-matching conditions. Finally, to verify our architecture, we have designed this analog filter chip with TSMC 0.35 μm 2P4M CMOS technology. This chip operates to 1.125 MHz and consumes 30.95 mW. The chip area of the analog filter is about 0.822 mm2.


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