Effects of buffer leakage current on breakdown voltage in AlGaN/GaN HEMTs with a high-k passivation layer

Author(s):  
Yoshiki Satoh ◽  
Hideyuki Hanawa ◽  
Kazushige Horio
2021 ◽  
Vol 68 (4) ◽  
pp. 1550-1556
Author(s):  
R. Tomita ◽  
S. Ueda ◽  
T. Kawada ◽  
H. Mitsuzono ◽  
K. Horio

2015 ◽  
Vol 46 (12) ◽  
pp. 1387-1391 ◽  
Author(s):  
Binola K. Jebalin ◽  
A. Shobha Rekh ◽  
P. Prajoon ◽  
N.Mohan Kumar ◽  
D. Nirmal

2014 ◽  
Vol 61 (3) ◽  
pp. 769-775 ◽  
Author(s):  
Hideyuki Hanawa ◽  
Hiraku Onodera ◽  
Atsushi Nakajima ◽  
Kazushige Horio

2007 ◽  
Vol 134 ◽  
pp. 379-382
Author(s):  
Claire Therese Richard ◽  
D. Benoit ◽  
S. Cremer ◽  
L. Dubost ◽  
B. Iteprat ◽  
...  

3D architecture is an alternative way to high-k dielectric to increase the capacitance of MIM structure. However, the top of this kind of structure is very sensitive to defectivity and then requires a special wet treatment. In this paper, we present the process flow for a 3D MIM integration in a CMOS copper back-end and a two steps wet process which provides very good electrical performances, i.e. leakage current lower than 10-9A.cm-2 at 5V / 125°C and breakdown voltage higher than 20V. At first, a SC1 step is done for electrode isolation improvement by material etching with good selectivity towards dielectric: that’s the electrode recess. In the second time, a HF step is done for copper oxide dilution and residues removal from the top of the 3D structure.


2018 ◽  
Vol 27 (9) ◽  
pp. 097309 ◽  
Author(s):  
Sheng Zhang ◽  
Ke Wei ◽  
Yang Xiao ◽  
Xiao-Hua Ma ◽  
Yi-Chuan Zhang ◽  
...  

2019 ◽  
Vol 114 (1) ◽  
pp. 013503 ◽  
Author(s):  
Sheng Zhang ◽  
Ke Wei ◽  
Xiao-Hua Ma ◽  
Bin Hou ◽  
Guo-Guo Liu ◽  
...  

Author(s):  
ShengLei Zhao ◽  
XiaoJun Fu ◽  
Fan Liu ◽  
LunCai Liu ◽  
Jun Luo ◽  
...  
Keyword(s):  
High K ◽  

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