A High-Speed and Memory Efficient Pipeline Architecture for Packet Classification

2010 ◽  
Author(s):  
Yeim-Kuan Chang ◽  
Yi-Shang Lin ◽  
Cheng-Chien Su
Keyword(s):  
High Speed ◽  
Packet Classification ◽  
Pipeline Architecture ◽  
Memory Efficient

Efficient Memristor-Based Architecture for Intrusion Detection and High-Speed Packet Classification

2018 ◽  
Vol 14 (4) ◽  
pp. 1-27 ◽  
Author(s):  
Venkataramesh Bontupalli ◽  
Chris Yakopcic ◽  
Raqibul Hasan ◽  
Tarek M. Taha
Keyword(s):  
Intrusion Detection ◽  
High Speed ◽  
Packet Classification

High-speed and memory-efficient VLSI design of 2D DWT for JPEG2000

2006 ◽  
Vol 42 (16) ◽  
pp. 907 ◽  
Author(s):  
K. Mei ◽  
N. Zheng ◽  
H. van de Wetering
Keyword(s):  
High Speed ◽  
Vlsi Design ◽  
Memory Efficient

scholarly journals A Memory-Efficient and High-Speed Sine/Cosine Generator Based on Parallel CORDIC Rotations

2004 ◽  
Vol 11 (2) ◽  
pp. 152-155 ◽  
Author(s):  
S.-F. Hsiao ◽  
Y.-H. Hu ◽  
T.-B. Juang
Keyword(s):  
High Speed ◽  
Memory Efficient

BFAST: High-Speed and Memory-Efficient Approach for NDN Forwarding Engine

2017 ◽  
Vol 25 (2) ◽  
pp. 1235-1248 ◽  
Author(s):  
Huichen Dai ◽  
Jianyuan Lu ◽  
Yi Wang ◽  
Tian Pan ◽  
Bin Liu
Keyword(s):  
High Speed ◽  
Efficient Approach ◽  
Forwarding Engine ◽  
Memory Efficient
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