sFPGA — A scalable switch based FPGA architecture and design methodology

2008 International Conference on Field Programmable Logic and Applications ◽

10.1109/fpl.2008.4629914 ◽

2008 ◽

Author(s):

Shakith Fernando ◽

Xiaolei Chen ◽

Yajun Ha

Keyword(s):

Design Methodology ◽

Fpga Architecture ◽

Architecture And Design

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sFPGA2 - A scalable GALS FPGA architecture and design methodology

10.1109/fpl.2009.5272278 ◽

2009 ◽

Author(s):

Rizwan Syed ◽

Xiaolei Chen ◽

Yajun Ha ◽

Bharadwaj Veeravalli

Keyword(s):

Design Methodology ◽

Fpga Architecture ◽

Architecture And Design

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Architecture and Design Methodology of Self-Optimizing Mechatronic Systems

Mechatronic Systems Simulation Modeling and Control ◽

10.5772/9121 ◽

2010 ◽

Author(s):

Jurgen Gausemeier ◽

Sascha Kahl

Keyword(s):

Design Methodology ◽

Mechatronic Systems ◽

Architecture And Design

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Architecture and design methodology of a 32-bit microprocessor

[1991] Proceedings, Advanced Computer Technology, Reliable Systems and Applications ◽

10.1109/cmpeur.1991.257460 ◽

2002 ◽

Author(s):

F. Bozzetti ◽

C. Silvano

Keyword(s):

Design Methodology ◽

Architecture And Design

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Application-specific coarse-grained reconfigurable array: architecture and design methodology

International Journal of Electronics ◽

10.1080/00207217.2014.942885 ◽

2014 ◽

Vol 102 (6) ◽

pp. 897-910

Author(s):

Li Zhou ◽

Dongpei Liu ◽

Jianfeng Zhang ◽

Hengzhu Liu

Keyword(s):

Design Methodology ◽

Coarse Grained ◽

Array Architecture ◽

Reconfigurable Array ◽

Architecture And Design ◽

Application Specific

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Optical Ring Network-on-Chip (ORNoC): Architecture and design methodology

2011 Design, Automation & Test in Europe ◽

10.1109/date.2011.5763134 ◽

2011 ◽

Author(s):

S Le Beux ◽

J Trajkovic ◽

I O'Connor ◽

G Nicolescu ◽

G Bois ◽

...

Keyword(s):

Design Methodology ◽

Network On Chip ◽

Ring Network ◽

On Chip ◽

Architecture And Design ◽

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Feedback Control Architecture and Design Methodology for Service Delay Guarantees in Web Servers

IEEE Transactions on Parallel and Distributed Systems ◽

10.1109/tpds.2006.123 ◽

2006 ◽

Vol 17 (9) ◽

pp. 1014-1027 ◽

Author(s):

Chenyang Lu ◽

Ying Lu ◽

T.F. Abdelzaher ◽

J.A. Stankovic ◽

Sang Hyuk Son

Keyword(s):

Feedback Control ◽

Design Methodology ◽

Control Architecture ◽

Web Servers ◽

Service Delay ◽

Delay Guarantees ◽

Architecture And Design

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A network on chip architecture and design methodology

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016885 ◽

2003 ◽

Author(s):

S. Kumar ◽

A. Jantsch ◽

J.-P. Soininen ◽

M. Forsell ◽

M. Millberg ◽

...

Keyword(s):

Design Methodology ◽

Network On Chip ◽

On Chip ◽

Architecture And Design

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A 64-way VLIW/SIMD FPGA architecture and design flow

Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004. ◽

10.1109/icecs.2004.1399727 ◽

2005 ◽

Author(s):

A.K. Jones ◽

R. Hoare ◽

I.S. Kourtev ◽

J. Fazekas ◽

D. Kusic ◽

...

Keyword(s):

Design Flow ◽

Fpga Architecture ◽

Architecture And Design

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Unified Architecture and Design Methodology for Integrated SDM-WSS Employing PLC-Based Spatial Beam Transformer Array for Various Types of SDM Fibers

Optical Fiber Communication Conference ◽

10.1364/ofc.2016.w4b.3 ◽

2016 ◽

Author(s):

Masahiko Jinno ◽

Yutaka Mori

Keyword(s):

Design Methodology ◽

Spatial Beam ◽

Architecture And Design

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A Hierarchical Gate Array Architecture and Design Methodology

22nd ACM/IEEE Design Automation Conference ◽

10.1109/dac.1985.1585978 ◽

1985 ◽

Author(s):

M. Iacoponi ◽

D. Vail ◽

S. Bierly ◽

A. Ignatowski

Keyword(s):

Design Methodology ◽

Array Architecture ◽

Architecture And Design

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