Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002
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Efficient adder circuits based on a conservative reversible logic gate

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016879 ◽

2003 ◽

Author(s):

J.W. Bruce ◽

M.A. Thornton ◽

L. Shivakumaraiah ◽

P.S. Kokate ◽

X. Li

Keyword(s):

Reversible Logic

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High-performance field programmable VLSI processor based on a direct allocation of a control/data flow graph

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016881 ◽

2003 ◽

Author(s):

N. Ohsawa ◽

M. Hariyama ◽

M. Kameyama

Keyword(s):

High Performance ◽

Data Flow ◽

Data Flow Graph ◽

Control Data ◽

Field Programmable

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Automated synthesis of standard cells using genetic algorithms

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016888 ◽

2003 ◽

Author(s):

A. Bahuman ◽

B. Bishop ◽

K. Rasheed

Keyword(s):

Genetic Algorithms ◽

Automated Synthesis ◽

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A network on chip architecture and design methodology

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016885 ◽

2003 ◽

Author(s):

S. Kumar ◽

A. Jantsch ◽

J.-P. Soininen ◽

M. Forsell ◽

M. Millberg ◽

...

Keyword(s):

Design Methodology ◽

Network On Chip ◽

On Chip ◽

Architecture And Design

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Speedup of self-timed digital systems using Early Completion

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016884 ◽

2003 ◽

Author(s):

S.C. Smith

Keyword(s):

Digital Systems ◽

Early Completion

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Multi-output timed Shannon circuits

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016873 ◽

2003 ◽

Author(s):

M.A. Thornton ◽

R. Drechsler ◽

D.M. Miller

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Impact of technology scaling in the clock system power

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016875 ◽

2003 ◽

Author(s):

D. Duarte ◽

V. Narayanan ◽

M.J. Irwin

Keyword(s):

Technology Scaling ◽

Clock System ◽

Impact Of Technology ◽

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Accelerating retiming under the coupled-edge timing model

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016887 ◽

2003 ◽

Author(s):

I. Neumann ◽

K. Sulimma ◽

W. Kunz

Keyword(s):

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VLSI implementation for MAC-level DWT architecture

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016882 ◽

2003 ◽

Author(s):

Shiuh-Rong Huang ◽

Lan-Rong Dung

Keyword(s):

Vlsi Implementation

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Optimal supply and threshold scaling for subthreshold CMOS circuits

Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002 ◽

10.1109/isvlsi.2002.1016866 ◽

2003 ◽

Author(s):

A. Wang ◽

A.P. Chandrakasan ◽

S.V. Kosonocky

Keyword(s):

Cmos Circuits ◽

Subthreshold Cmos

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