Generalized Virtual Full-Duplex Relaying Protocol Based on Buffer-Aided Half-Duplex Relay Nodes

Author(s):  
Miharu Oiwa ◽  
Shinya Sugiura
Keyword(s):  
2021 ◽  
Author(s):  
Gan Srirutchataboon ◽  
Jun Kochi ◽  
Shinya Sugiura

This paper proposes novel buffer-aided relaying selection in a two-hop cooperative network based on virtual full-duplex (VFD) and half-duplex transmission. The proposed scheme consists of five relay selection modes, i.e., two unicast modes, a broadcast mode, a cooperative beamforming mode, and a VFD mode. The broadcast mode allows multiple relay nodes to seamlessly share a common packet, which allows us to solve the inter-relay interference problem imposed on the VFD mode.


2021 ◽  
Author(s):  
Gan Srirutchataboon ◽  
Jun Kochi ◽  
Shinya Sugiura

This paper proposes novel buffer-aided relaying selection in a two-hop cooperative network based on virtual full-duplex (VFD) and half-duplex transmission. The proposed scheme consists of five relay selection modes, i.e., two unicast modes, a broadcast mode, a cooperative beamforming mode, and a VFD mode. The broadcast mode allows multiple relay nodes to seamlessly share a common packet, which allows us to solve the inter-relay interference problem imposed on the VFD mode.


IEEE Access ◽  
2017 ◽  
Vol 5 ◽  
pp. 7737-7745 ◽  
Author(s):  
Yurong Wang ◽  
Kui Xu ◽  
Aijun Liu ◽  
Xiaochen Xia
Keyword(s):  

2011 ◽  
Vol 383-390 ◽  
pp. 6840-6845 ◽  
Author(s):  
Yong Hong Gu ◽  
Wei Huang ◽  
Qiao Li Yang

To transmit and receive data over any network successfully, a protocol is required to manage the flow. High-level Data Link Control (HDLC) protocol is defined in Layer 2 of OSI model and is one of the most commonly used Layer 2 protocol. HDLC supports both full-duplex and half-duplex data transfer. In addition, it offers error control and flow control. Currently on the market there are many dedicated HDLC chips, but these chips are neither of control complexity nor of limited number of channels. This paper presents a new method for implementing a multi-channel HDLC protocol controller using Altera FPGA and VHDL as the target technology. Implementing a multi-channel HDLC protocol controller in FPGA offers the flexibility, upgradability and customization benefits of programmable logic and also reduces the total cost of every project which involves HDLC protocol controllers.


2016 ◽  
Vol 52 (6) ◽  
pp. 483-485 ◽  
Author(s):  
Dingzhu Wen ◽  
Guanding Yu

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