A Power-and Area-Efficient DFE Receiver with Tap Coefficient-rotating Summer for IoT Applications

Author(s):  
Won-Jong Choi ◽  
Jae-Seung Jeong ◽  
Hyun-Wook Lim ◽  
Bai-Sun Kong
Micromachines ◽  
2019 ◽  
Vol 10 (8) ◽  
pp. 541 ◽  
Author(s):  
Xue ◽  
Wang ◽  
Liu ◽  
Lv ◽  
Wang ◽  
...  

Blockchain technology is increasingly being used in Internet of things (IoT) devices for information security and data integrity. However, it is challenging to implement complex hash algorithms with limited resources in IoT devices owing to large energy consumption and a long processing time. This paper proposes an RISC-V processor with memristor-based in-memory computing (IMC) for blockchain technology in IoT applications. The IMC-adapted instructions were designed for the Keccak hash algorithm by virtue of the extendibility of the RISC-V instruction set architecture (ISA). Then, an RISC-V processor with area-efficient memristor-based IMC was developed based on an open-source core for IoT applications, Hummingbird E200. The general compiling policy with the data allocation method is also disclosed for the IMC implementation of the Keccak hash algorithm. An evaluation shows that >70% improvements in both performance and energy saving were achieved with limited area overhead after introducing IMC in the RISC-V processor.


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