bandwidth enhancement
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Author(s):  
Charernkiat Pochaiya ◽  
Srawouth Chandhaket ◽  
Prapan Leekul ◽  
Jhirat Mearnchu ◽  
Tanawut Tantisopharak ◽  
...  

<span>This paper presents a bandwidth enhancement of a dual-band bi-directional rectangular microstrip patch antenna. The novelty of this work lies in the modification of conventional rectangular microstip patch antenna by using the combination of two techniques: a complementary split ring resonator (CSRR) and a defected patch structure (DPS). The structure of antenna was studied and investigated via computer </span><span>simulation technology (CST). The dimension and position of CSRR on the ground plane was optimized to achieve dual bandwidth and bi-directional radiation pattern characteristics. In addition, the bandwidths were enhanced by defecting suitable shape incorporated in the microstrip patch. A prototype with overall dimension of 70.45×63.73 mm<sup>2</sup> has been fabricated on FR-4 substrate. To verify the proposed design, the impedance bandwidth, gain, and radiation patterns were carried out in measurements. The measured impedance bandwidths were respectively 560 MHz (3.08-3.64 GHz) and 950 GHz (4.64-5.59 GHz) while the measured gains of each bandwidth were respectively 4.28 dBi and 4.63 dBi. The measured radiation patterns were in good agreement with simulated ones. The proposed antenna achieves wide dual bandwidth and bi-directional radiation patterns performances. Consequently, it is a promising candidate for Wi-Fi or 5G communications in specific areas such as tunnel, corridor, or transit and rail.</span>


2022 ◽  
Vol 43 (1) ◽  
pp. 012401
Author(s):  
Quan Pan ◽  
Xiongshi Luo

Abstract This work presents a high-gain broadband inverter-based cascode transimpedance amplifier fabricated in a 65-nm CMOS process. Multiple bandwidth enhancement techniques, including input bonding wire, input series on-chip inductive peaking and negative capacitance compensation, are adopted to overcome the large off-chip photodiode capacitive loading and the miller capacitance of the input device, achieving an overall bandwidth enhancement ratio of 8.5. The electrical measurement shows TIA achieves 58 dBΩ up to 12.7 GHz with a 180-fF off-chip photodetector. The optical measurement demonstrates a clear open eye of 20 Gb/s. The TIA dissipates 4 mW from a 1.2-V supply voltage.


Author(s):  
Navneet Singh ◽  
◽  
Dr. Amit Jain ◽  
Dr. Dinesh Kumar Singh ◽  
◽  
...  

In this article, a single port with truncated corner and common T-shaped notch loaded microstrip patch antenna for bandwidth enhancement is presented which is useable for mid band of 5G applications. The design of this prototyped antenna is obtained by loading truncated corner and T-shaped notch on rectangular patch antenna having 50 Ω microstrip line feed. The optimized antenna 5 is selected as proposed antenna at design frequency 3 GHz among antenna 1- antenna 5after study of simulated results through IE3D Mentor Graphics simulation software. Proposed antenna covers a wide bandwidth from 2.39 to 4.04 GHz and fractional bandwidth of 51.3% with pair of resonance frequency having return loss of -23.38 dB and -29.65 dB respectively.


2021 ◽  
Vol 65 (1) ◽  
Author(s):  
Hao Li ◽  
Cunzheng Fan ◽  
Tao Liu ◽  
Yujia Liu ◽  
Zhijun Yan ◽  
...  

Electronics ◽  
2021 ◽  
Vol 10 (23) ◽  
pp. 3042
Author(s):  
Samuel B. S. Lee ◽  
Kiat Seng Yeo

This letter presents an inductorless transimpedance amplifier (TIA) for visible light communication, using the UMC 40 nm CMOS process. It consists of a single-to-differential input stage with a modified cross-coupled regulated cascode design, followed by a modified fT-doubler mid-stage with a combined active inductor and capacitive degeneration design for bandwidth-enhancement and differential output. The mid-stage also has an attached common-mode feedback (CMFB) circuit. Both the input and mid-stages have gain-varying and peaking-varying functions. It has a measured gain range of 37.5–58.7 dBΩ and 4.15 GHz bandwidth using a 0.5 pF capacitive load. The gain range results in an input dynamic range of 33.2 µA–1.46 mA. Its input referred noise current is 10.7 pA/Hz, core DC power consumption is 7.84 mW from a VDDTIA of 1.6 V and core area is 39 µm × 26 µm.


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