Low-Power Hardware Implementation for Parametric Rectified Linear Unit Function

2020 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan) ◽

10.1109/icce-taiwan49838.2020.9258135 ◽

2020 ◽

Author(s):

Yu-Hsuan Wu ◽

Wei-Hung Lin ◽

Shih-Hsu Huang

Keyword(s):

Low Power ◽

Hardware Implementation ◽

Rectified Linear Unit ◽

Unit Function ◽

Parametric Rectified Linear Unit

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Fruit category classification via an eight-layer convolutional neural network with parametric rectified linear unit and dropout technique

Multimedia Tools and Applications ◽

10.1007/s11042-018-6661-6 ◽

2018 ◽

Vol 79 (21-22) ◽

pp. 15117-15133 ◽

Cited By ~ 12

Author(s):

Shui-Hua Wang ◽

Yi Chen

Keyword(s):

Neural Network ◽

Convolutional Neural Network ◽

Rectified Linear Unit ◽

Parametric Rectified Linear Unit

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Hardware Implementation of Low-Power Low-Area Programmable Interval Type-2 Fuzzifier

Electrical Engineering (ICEE), Iranian Conference on ◽

10.1109/icee.2018.8472446 ◽

2018 ◽

Author(s):

Rouhollah Mohammadi Nasr ◽

Abdollah Khoei

Keyword(s):

Low Power ◽

Hardware Implementation ◽

Low Area ◽

Interval Type

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Optimized CNN with Point-Wise Parametric Rectified Linear Unit for Spatial Image Steganalysis

Digital Forensics and Watermarking - Lecture Notes in Computer Science ◽

10.1007/978-3-030-43575-2_3 ◽

2020 ◽

pp. 32-42

Author(s):

Yi-ming Xue ◽

Wan-li Peng ◽

Yuzhu Wang ◽

Juan Wen ◽

Ping Zhong

Keyword(s):

Image Steganalysis ◽

Spatial Image ◽

Rectified Linear Unit ◽

Parametric Rectified Linear Unit

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DPReLU: Dynamic Parametric Rectified Linear Unit

10.1145/3426020.3426049 ◽

2020 ◽

Author(s):

Kien Mai Ngoc ◽

Donghun Yang ◽

Iksoo Shin ◽

Hoyong Kim ◽

Myunggwon Hwang

Keyword(s):

Rectified Linear Unit ◽

Parametric Rectified Linear Unit

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On SFC Low Power Hardware Implementation in FPGAs

IFAC-PapersOnLine ◽

10.1016/j.ifacol.2019.12.734 ◽

2019 ◽

Vol 52 (27) ◽

pp. 62-67

Author(s):

Adam Milik ◽

Edward Hrynkiewicz

Keyword(s):

Low Power ◽

Hardware Implementation

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Hybrid Neural Network, An Efficient Low-Power Digital Hardware Implementation of Event-based Artificial Neural Network

2018 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2018.8351562 ◽

2018 ◽

Cited By ~ 4

Author(s):

Amirreza Yousefzadeh ◽

Garrick Orchard ◽

Evangelos Stromatias ◽

Teresa Serrano-Gotarredona ◽

Bernabe Linares-Barranco

Keyword(s):

Neural Network ◽

Artificial Neural Network ◽

Low Power ◽

Hardware Implementation ◽

Hybrid Neural Network ◽

Digital Hardware ◽

Artificial Neural ◽

Event Based

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A Low Power Hardware Implementation of Izhikevich Neuron using Stochastic Computing

2018 30th International Conference on Microelectronics (ICM) ◽

10.1109/icm.2018.8704080 ◽

2018 ◽

Author(s):

Aya A. Ismail ◽

Zeinab A. Shaheen ◽

Osama Rashad ◽

Khaled N. Salama ◽

Hassan Mostafa

Keyword(s):

Low Power ◽

Hardware Implementation ◽

Stochastic Computing

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Low-power hardware implementation of ECC processor suitable for low-cost RFID tags

2008 9th International Conference on Solid-State and Integrated-Circuit Technology ◽

10.1109/icsict.2008.4734876 ◽

2008 ◽

Cited By ~ 1

Author(s):

Peng Luo ◽

Xinan Wang ◽

Jun Feng ◽

Ying Xu

Keyword(s):

Low Power ◽

Hardware Implementation ◽

Low Cost ◽

Rfid Tags

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Low Power Hardware Implementation of High Speed FFT Core

2010 International Conference on Advances in Computer Engineering ◽

10.1109/ace.2010.34 ◽

2010 ◽

Author(s):

Akshay Sridharan ◽

A. Viji

Keyword(s):

Low Power ◽

High Speed ◽

Hardware Implementation

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An ultra-low-power VAD hardware implementation for intelligent ubiquitous sensor networks

2009 IEEE Workshop on Signal Processing Systems ◽

10.1109/sips.2009.5336254 ◽

2009 ◽

Cited By ~ 14

Author(s):

Hiroki Noguchi ◽

Tomoya Takagi ◽

Masahiko Yoshimoto ◽

Hiroshi Kawaguchi

Keyword(s):

Sensor Networks ◽

Low Power ◽

Hardware Implementation ◽

Ultra Low Power ◽

Ubiquitous Sensor Networks

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