A current mode maximum winner-take-all circuit with low voltage requirement for min-sum analog iterative decoders

2004 ◽  
Author(s):  
S. Hemati ◽  
A.H. Banihashemi
Keyword(s):  
Low Voltage ◽  
Current Mode ◽  
Iterative Decoders ◽  
Winner Take All ◽  
A Current ◽  
Take All

A Current-Mirror Winner-Take-All Sense Amplifier for Low Voltage SRAMs

2013 ◽  
Vol E96.C (9) ◽  
pp. 1205-1207
Author(s):  
Song JIA ◽  
Heqing XU ◽  
Fengfeng WU ◽  
Yuan WANG
Keyword(s):  
Low Voltage ◽  
Current Mirror ◽  
Sense Amplifier ◽  
Winner Take All ◽  
A Current ◽  
Take All

A current-mode bit-block circuit applicable to low-voltage, low-power pipeline video-speed A/D converters

1996 ◽  
Vol 11 (2) ◽  
Author(s):  
Yasuhiro Sugimoto ◽  
Shunsaku Tokito ◽  
Hisao Kakitani ◽  
Eitaro Seta
Keyword(s):  
Low Power ◽  
Low Voltage ◽  
Current Mode ◽  
A Current

Four Bit Priority Resolution Network Using Current Mode Winner Take all Circuit

2014 ◽  
Vol 889-890 ◽  
pp. 886-889
Author(s):  
Wen Qin Cao ◽  
Hai Yan Zhu ◽  
Guo Ping Tu
Keyword(s):  
Current Mode ◽  
Cmos Process ◽  
Process Technology ◽  
Output Stage ◽  
New Approach ◽  
Input Stage ◽  
Load Resistor ◽  
Winner Takes All ◽  
Winner Take All ◽  
Take All

This paper presents a new approach for making a four bit priority resolution circuit using current mode winner Take all (WTA) analog computation cells, the winner-takes-all circuit is employed to evaluate the highest input among a set of competing inputs and inhibit the others. This circuit consists of an input stage, a current mode Lazzaros WTA circuit and an output stage consisting of current mirror and load resistor. This circuit is compact, consisting of a total of 28 transistors including the input stage, and a good linearity is observed in response. Simulation of proposed circuit is performed on cadence virtuoso software in 0.18 μm CMOS process technology.

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