A Low Power Current Mode PUF Based on Winner-Take-All Scheme

Author(s):  
Wenhan Zheng ◽  
Xiaofang Pan ◽  
Xiaojin Zhao
2014 ◽  
Vol 889-890 ◽  
pp. 886-889
Author(s):  
Wen Qin Cao ◽  
Hai Yan Zhu ◽  
Guo Ping Tu

This paper presents a new approach for making a four bit priority resolution circuit using current mode winner Take all (WTA) analog computation cells, the winner-takes-all circuit is employed to evaluate the highest input among a set of competing inputs and inhibit the others. This circuit consists of an input stage, a current mode Lazzaros WTA circuit and an output stage consisting of current mirror and load resistor. This circuit is compact, consisting of a total of 28 transistors including the input stage, and a good linearity is observed in response. Simulation of proposed circuit is performed on cadence virtuoso software in 0.18 μm CMOS process technology.


2014 ◽  
Vol 577 ◽  
pp. 478-481 ◽  
Author(s):  
Han Wang ◽  
Yi Cheng Zeng ◽  
Zhi Jun Li

A new current mode circuit which can maintain the maximum output and minimum output at the same time is presented in this paper. The design technique is achieved by the combination of trans linear loop, winner take all (WTA) circuit and loser take all (LTA) circuit. Therefore, the proposed circuit can be more practical than conventional circuits and can be easily designed in 0.5 μm CMOS technology for CSMC. Analysis and simulations of WTA and LTA circuit have been shown to display the usability of the proposed circuit, where the input frequency range is around 10 MHz. The proposed circuit can also play a neuron role in artificial neural network (ANN) implemented in the form of an integrated circuit.


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