A 40-nm CMOS, 1.1-V, 101-dB DR, 1.7-mW continuous-time ΣΔ ADC for a digital closed-loop class-D amplifier

Author(s):  
Achille Donida ◽  
Piero Malcovati ◽  
Angelo Nagari ◽  
Remy Cellier ◽  
Andrea Baschirotto
2015 ◽  
Vol 62 (3) ◽  
pp. 645-653 ◽  
Author(s):  
Achille Donida ◽  
Remy Cellier ◽  
Angelo Nagari ◽  
Piero Malcovati ◽  
Andrea Baschirotto

2010 ◽  
Vol 45 (7) ◽  
pp. 1389-1398 ◽  
Author(s):  
Benno Krabbenborg ◽  
Marco Berkhout

Sign in / Sign up

Export Citation Format

Share Document