A 60-GHz Millimeter-Wave Triangular Monopole Antenna Fabricated Using 0.18-m m CMOS Technology

Author(s):  
P.-C. Kuo ◽  
S.-S. Hsu ◽  
C.-C. Lin ◽  
C.-Y. Hsu ◽  
H.-R. Chuang
2008 ◽  
Vol 29 (3) ◽  
pp. 246-248 ◽  
Author(s):  
Hsu Cheng-Ying ◽  
Chen Chu-Yu ◽  
Chuang Huey-Ru

2009 ◽  
Vol 51 (3) ◽  
pp. 766-770 ◽  
Author(s):  
C.-H. Liu ◽  
C.-Y. Hsu ◽  
H.-R. Chuang ◽  
C.-Y. Chen

2008 ◽  
Vol 29 (6) ◽  
pp. 625-627 ◽  
Author(s):  
Shun-Sheng Hsu ◽  
Kuo-Chih Wei ◽  
Cheng-Ying Hsu ◽  
Huey Ru-Chuang

2011 ◽  
Vol 4 (1) ◽  
pp. 93-100 ◽  
Author(s):  
Xiao-Lan Tang ◽  
Emmanuel Pistono ◽  
Philippe Ferrari ◽  
Jean-Michel Fournier

This paper shows the contribution of slow-wave coplanar waveguides on the performance of power amplifiers operating at millimeter-wave frequencies in CMOS-integrated technologies. These transmission lines present a quality factor Q two to three times higher than that of the conventional microstrip lines at the same characteristic impedance. To demonstrate the contribution of the slow-wave transmission lines on integrated millimeter-wave amplifiers performance, two Class-A single-stage power amplifiers (PA) operating at 60 GHz were designed in standard 40 nm CMOS technology. One of the power amplifiers incorporates only the microstrip lines, whereas slow-wave coplanar transmission lines are considered in the other one. Both amplifiers are biased in Class-A operation, drawing, respectively, 22 and 23 mA from 1.2 V supply. Compared to the power amplifier using conventional microstrip transmission lines, the one implemented with slow-wave transmission lines shows improved performances in terms of gain (5.6 dB against 3.3 dB), 1 dB output compression point (OCP1dB: 7 dBm against 5 dBm), saturated output power (Psat: >10 and 8 dBm, respectively), power-added efficiency (PAE: 16% instead of 6%), and die area without pads (Sdie: 0.059 mm2 against 0.069 mm2).


2017 ◽  
Vol 26 (05) ◽  
pp. 1750075 ◽  
Author(s):  
Najam Muhammad Amin ◽  
Lianfeng Shen ◽  
Zhi-Gong Wang ◽  
Muhammad Ovais Akhter ◽  
Muhammad Tariq Afridi

This paper presents the design of a 60[Formula: see text]GHz-band LNA intended for the 63.72–65.88[Formula: see text]GHz frequency range (channel-4 of the 60[Formula: see text]GHz band). The LNA is designed in a 65-nm CMOS technology and the design methodology is based on a constant-current-density biasing scheme. Prior to designing the LNA, a detailed investigation into the transistor and passives performances at millimeter-wave (MMW) frequencies is carried out. It is shown that biasing the transistors for an optimum noise figure performance does not degrade their power gain significantly. Furthermore, three potential inductive transmission line candidates, based on coplanar waveguide (CPW) and microstrip line (MSL) structures, have been considered to realize the MMW interconnects. Electromagnetic (EM) simulations have been performed to design and compare the performances of these inductive lines. It is shown that the inductive quality factor of a CPW-based inductive transmission line ([Formula: see text] is more than 3.4 times higher than its MSL counterpart @ 65[Formula: see text]GHz. A CPW structure, with an optimized ground-equalizing metal strip density to achieve the highest inductive quality factor, is therefore a preferred choice for the design of MMW interconnects, compared to an MSL. The LNA achieves a measured forward gain of [Formula: see text][Formula: see text]dB with good input and output impedance matching of better than [Formula: see text][Formula: see text]dB in the desired frequency range. Covering a chip area of 1256[Formula: see text][Formula: see text]m[Formula: see text]m including the pads, the LNA dissipates a power of only 16.2[Formula: see text]mW.


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