Minimum crosstalk layer assignment in a three layer HVH channel routing based on linear pseudo Boolean optimization

Author(s):  
Kyoung Jhang
VLSI Design ◽  
1998 ◽  
Vol 7 (1) ◽  
pp. 73-84
Author(s):  
Shashidhar Thakur ◽  
Kai-Yuan Chao ◽  
D. F. Wong

With the increasing density of VLSI circuits, the interconnection wires are getting packed even closer. This has increased the effect of interaction between these wires on circuit performance and hence, the importance of controlling crosstalk. We consider the gridded channel routing problem where, specifically, the channel has 3 routing layers in the VHV configuration. Given a horizontal track assignment for the nets, we present an optimal algorithm for minimizing the crosstalk between vertical wiring segments in the channel by finding an optimal vertical layer assignment for them. We give an algorithm that minimizes total crosstalk between vertical wires on the same V layer on adjacent columns of the grid in O(ν logν) time using O(ν) memory, where the channel has ν columns. We then extend this algorithm to consider crosstalk between wires in nonadjacent columns and between wires on different layers. Finally, we show how our algorithms can be extended to take crosstalk tolerance specifications for nets into account.


2015 ◽  
Vol 24 (06) ◽  
pp. 1550083
Author(s):  
Dahua Zhang ◽  
Wei Li ◽  
Tao Du

The segmented channel routing problem is fundamental to the routing of row-based field programmable gate arrays (FPGAs) and is proven to be nondeterministic polynomial time (NP) complete. In this paper, we capitalize on the compelling advancements in satisfiability (SAT) solvers to propose a multilevel pseudo-Boolean SAT-based approach. We construct several levels of hierarchy amongst the nets and the routing problem of each level is formulated as a pseudo-Boolean optimization (PBO) problem. Moreover, an optimization technique of reducing the number of variables in PBO problems is described to improve the scalability of the proposed method. Similar to the SAT-based routing, the unroutability of a given circuit can be proved by the approach. Experimental results show that the proposed method compares very favorably with existing algorithms and achieves the best convergence rate.


1988 ◽  
Vol 135 (2) ◽  
pp. 45
Author(s):  
H.W. Leong ◽  
C.L. Liu
Keyword(s):  

Author(s):  
Satoshi TAYU ◽  
Toshihiko TAKAHASHI ◽  
Eita KOBAYASHI ◽  
Shuichi UENO

2013 ◽  
Vol 33 (6) ◽  
pp. 1548-1552
Author(s):  
Wenchao GAO ◽  
Qiang ZHOU ◽  
Xu QIAN ◽  
Yici CAI

Author(s):  
Genggeng Liu ◽  
Xinghai Zhang ◽  
Wenzhong Guo ◽  
Xing Huang ◽  
Wen-Hao Liu ◽  
...  
Keyword(s):  

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