A reconfigurable digital signal processor architecture for high-efficiency MPEG-4 video encoding
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2014 ◽
Vol 22
(2)
◽
pp. 313-321
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2014 ◽
Vol 9
(1)
◽
pp. 56-59
1981 ◽
Vol 60
(7)
◽
pp. 1449-1462
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