A High-linearity CMOS Analog Baseband Circuit with reconfigurable Gain and Bandwidth for 76-81GHz Automotive Radar

Author(s):  
Bowen Wu ◽  
Zongming Duan ◽  
Dongfang Pan ◽  
Yan Wang ◽  
Yang Zhou
2015 ◽  
Vol 36 (2) ◽  
pp. 025002
Author(s):  
Li Ma ◽  
Zhigong Wang ◽  
Jian Xu ◽  
Yiqiang Wu ◽  
Junliang Wang ◽  
...  

2018 ◽  
Vol 97 (2) ◽  
pp. 313-322 ◽  
Author(s):  
Dongfang Pan ◽  
Zongming Duan ◽  
Lu Huang ◽  
Yan Wang ◽  
Yang Zhou ◽  
...  

Electronics ◽  
2020 ◽  
Vol 9 (5) ◽  
pp. 831 ◽  
Author(s):  
Jingyu Han ◽  
Yu Jiang ◽  
Guiliang Guo ◽  
Xu Cheng

A highly reconfigurable open-loop analog baseband circuitry with programmable gain, bandwidth and filter order are proposed for integrated linear frequency modulated continuous wave (LFMCW) radar receivers in this paper. This analog baseband chain allocates noise, gain and channel selection specifications to different stages, for the sake of noise and linearity tradeoffs, by introducing a multi-stage open-loop cascaded amplifier/filter topology. The topology includes a course gain tuning pre-amplifier, a folded Gilbert variable gain amplifier (VGA) with a symmetrical dB-linear voltage generator and a 10-bit R-2R DAC for fine gain tuning, a level shifter, a programmable Gm-C low pass filter, a DC offset cancellation circuit, two fixed gain amplifiers with bandwidth extension and a novel buffer amplifier with active peaking for testing purposes. The noise figure is reduced with the help of a low noise pre-amplifier stage, while the linearity is enhanced with a power-efficient buffer and a novel high linearity Gm-C filter. Specifically, the Gm-C filter improves its linearity specification with no increase in power consumption, thanks to an alteration of the trans-conductor/capacitor connection style, instead of pursuing high linearity but power-hungry class-AB trans-conductors. In addition, the logarithmic bandwidth tuning technique is adopted for capacitor array size minimization. The linear-in-dB and DAC gain control topology facilitates the analog baseband gain tuning accuracy and stability, which also provides an efficient access to digital baseband automatic gain control. The analog baseband chip is fabricated using 130-nm SiGe BiCMOS technology. With a power consumption of 5.9~8.8 mW, the implemented circuit achieves a tunable gain range of −30~27 dB (DAC linear gain step guaranteed), a programmable −3 dB bandwidth of 18/19/20/21/22/23/24/25 MHz, a filter order of 3/6 and a gain resolution of better than 0.07 dB.


2019 ◽  
Vol 13 (8) ◽  
pp. 1203-1208
Author(s):  
Dongfang Pan ◽  
Zongming Daun ◽  
Liguo Sun ◽  
Ping Gui

2021 ◽  
Vol 57 (2) ◽  
pp. 48-50
Author(s):  
A. Siddique ◽  
T. S. Delwar ◽  
J. Y. Ryu

Sign in / Sign up

Export Citation Format

Share Document