This work mainly focus on the design and implementation of context-based adaptive binary arithmetic coding (CABAC) parallelization on multicourse digital signal processor (DSP) platform. Syntax elements partitioning based on load balancing is proposed to achieve data parallelization of CABAC. On the multicourse DSP, a task-dispatch structure is proposed. Inter-core communication is achieved by combination of shared memory and interrupt. And inter-core synchronization is achieved by combination of shared variable and hardware semaphore. The above structure makes the overall system clearer and program control easier. A speedup of 2.77 is obtained.
Design and implementation of MIMO radar real-time imaging system based on multicore DSP
