A 10-bit 1-GS/s 2x-Interleaved Timing-Skew Calibration Free SAR ADC

2019 IEEE International Symposium on Circuits and Systems (ISCAS) ◽

10.1109/iscas.2019.8702455 ◽

2019 ◽

Author(s):

Huan-Jui Hu ◽

Yi-Shen Cheng ◽

Soon-Jyh Chang

Keyword(s):

Sar Adc ◽

Calibration Free ◽

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A 7-bit 2 GS/s Time-Interleaved SAR ADC With Timing Skew Calibration Based on Current Integrating Sampler

IEEE Transactions on Circuits and Systems I Regular Papers ◽

10.1109/tcsi.2020.3039252 ◽

2020 ◽

pp. 1-12

Author(s):

Wenning Jiang ◽

Yan Zhu ◽

Chi-Hang Chan ◽

Boris Murmann ◽

Rui Paulo Martins

Keyword(s):

Sar Adc ◽

Time Interleaved ◽

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An Amplifier-Less Calibration-Free SAR ADC Achieving >100dB SNDR for Multi-Channel ECG Acquisition with 667mVpp Linear Input Range

2019 Symposium on VLSI Circuits ◽

10.23919/vlsic.2019.8777944 ◽

2019 ◽

Author(s):

Wei-Hsiang Huang ◽

Su-Hao Wu ◽

Zhi-Xin Chen ◽

Yun-Shiang Shu

Keyword(s):

Sar Adc ◽

Input Range ◽

Calibration Free

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20.3 A 50MHz-Bandwidth 70.4dB-SNDR Calibration-Free Time-Interleaved 4th-Order Noise-Shaping SAR ADC

2019 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc.2019.8662313 ◽

2019 ◽

Author(s):

Lu Jie ◽

Boyi Zheng ◽

Michael P. Flynn

Keyword(s):

Sar Adc ◽

Free Time ◽

Noise Shaping ◽

Calibration Free ◽

Time Interleaved

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A 10-b 800MS/s time-interleaved SAR ADC with fast timing-skew calibration

2016 IEEE Asian Solid-State Circuits Conference (A-SSCC) ◽

10.1109/asscc.2016.7844138 ◽

2016 ◽

Author(s):

Jeonggoo Song ◽

Kareem Ragab ◽

Xiyuan Tang ◽

Nan Sun

Keyword(s):

Sar Adc ◽

Fast Timing ◽

Time Interleaved ◽

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A 12-bit 600-MS/s time-interleaved SAR ADC with background timing skew calibration

2016 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) ◽

10.1109/rfit.2016.7578191 ◽

2016 ◽

Author(s):

Yen-Hsin Wei ◽

Chin-Yu Lin ◽

Tai-Cheng Lee

Keyword(s):

Sar Adc ◽

Time Interleaved ◽

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Time interleaved C-2C SAR ADC with background timing skew calibration in 65nm CMOS

ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC) ◽

10.1109/esscirc.2014.6942058 ◽

2014 ◽

Author(s):

Luke Wang ◽

Qiwei Wang ◽

Anthony Chan Carusone

Keyword(s):

Sar Adc ◽

Time Interleaved ◽

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A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4x Passive Gain and Second-Order DAC Mismatch Error Shaping

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2021.3087661 ◽

2021 ◽

pp. 1-1

Author(s):

Jiaxin Liu ◽

Xing Wang ◽

Zijie Gao ◽

Mingtao Zhan ◽

Xiyuan Tang ◽

...

Keyword(s):

Second Order ◽

Sar Adc ◽

Noise Shaping ◽

Mismatch Error ◽

Calibration Free ◽

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16.4 A Calibration-Free 71.7dB SNDR 100MS/s 0.7mW Weighted-Averaging Correlated Level Shifting Pipelined SAR ADC with Speed-Enhancement Scheme

2020 IEEE International Solid- State Circuits Conference - (ISSCC) ◽

10.1109/isscc19947.2020.9063055 ◽

2020 ◽

Author(s):

Tsung-Chih Hung ◽

Jia-Ching Wang ◽

Tai-Haur Kuo

Keyword(s):

Sar Adc ◽

Weighted Averaging ◽

Calibration Free ◽

Correlated Level Shifting

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22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC) ◽

10.1109/isscc.2014.6757480 ◽

2014 ◽

Author(s):

Sunghyuk Lee ◽

Anantha P. Chandrakasan ◽

Hae-Seung Lee

Keyword(s):

Sar Adc ◽

Time Interleaved ◽

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A 10-b 800-MS/s Time-Interleaved SAR ADC With Fast Variance-Based Timing-Skew Calibration

IEEE Journal of Solid-State Circuits ◽

10.1109/jssc.2017.2713523 ◽

2017 ◽

Vol 52 (10) ◽

pp. 2563-2575 ◽

Author(s):

Jeonggoo Song ◽

Kareem Ragab ◽

Xiyuan Tang ◽

Nan Sun

Keyword(s):

Sar Adc ◽

Time Interleaved ◽

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