Removing mains interference from the mfERG by applying a post-processing digital notch filter: for the good or the bad?

Purpose Ideally, the multifocal electroretinogram (mfERG) is recorded without noticeable intrusion of mains interference. However, sometimes contamination is difficult to avoid. A post-processing digital notch filter can help to recover the retinal response even in severe cases of mains interference. While a digital filter can be designed to have little to no impact on peak times, filtering out mains interference also removes the retinal signal content of the same frequency, which may result in a change of amplitude. The present study addressed this issue in the standard first order kernel mfERG. Methods In 24 recordings from routine exams with no perceivable mains interference, the effects of 50-Hz and 60-Hz non-causal digital notch filters on amplitude and peak time were assessed. Furthermore, the effect of filtering on contaminated traces was demonstrated and simulated mains interference was used to provide an example of nonlinear superposition of retinal signal and mains interference. Results mfERG amplitudes were reduced by 0%–15% (median 6%) with the 50-Hz filter and remained virtually unaffected with the 60-Hz filter. Simulations illustrate that spurious high-frequency components can occur in the filtered signal if a strongly contaminated signal is clipped due to a limited input range of the analog-to-digital converter. Conclusion The application of a 50-Hz digital notch filter to mfERG traces causes a mild amplitude reduction which will not normally affect the clinical interpretation of the data. The situation is even more favorable with a 60-Hz digital notch filter. Caution is necessary if the assumption of linear additivity of retinal signal and mains interference is violated.

A Dual-Band Wide-Input-Range Adaptive CMOS RF–DC Converter for Ambient RF Energy Harvesting

In this paper, a dual-band wide-input-range adaptive radio frequency-to-direct current (RF–DC) converter operating in the 0.9 GHz and 2.4 GHz bands is proposed for ambient RF energy harvesting. The proposed dual-band RF–DC converter adopts a dual-band impedance-matching network to harvest RF energy from multiple frequency bands. To solve the problem consisting in the great degradation of the power conversion efficiency (PCE) of a multi-band rectifier according to the RF input power range because the available RF input power range is different according to the frequency band, the proposed dual-band RF rectifier adopts an adaptive configuration that changes the operation mode so that the number of stages is optimized. Since the optimum peak PCE can be obtained according to the RF input power, the PCE can be increased over a wide RF input power range of multiple bands. When dual-band RF input powers of 0.9 GHz and 2.4 GHz were applied, a peak PCE of 67.1% at an input power of −12 dBm and a peak PCE of 62.9% at an input power of −19 dBm were achieved. The input sensitivity to obtain an output voltage of 1 V was −17 dBm, and the RF input power range with a PCE greater than 20% was 21 dB. The proposed design achieved the highest peak PCE and the widest RF input power range compared with previously reported CMOS multi-band rectifiers.

Review of DC-DC Converter Topologies Based on Impedance Network with Wide Input Voltage Range and High Gain for Fuel Cell Vehicles

The development of fuel cell vehicles (FCVs) has a major impact on improving air quality and reducing other fossil-fuel-related problems. DC-DC boost converters with wide input voltage ranges and high gains are essential to fuel cells and DC buses in the powertrains of FCVs, helping to improve the low voltage of fuel cells and “soft” output characteristics. To build DC-DC converters with the desired performance, their topologies have been widely investigated and optimized. Aiming to obtain the optimal design of wide input range and high-gain DC-DC boost converter topologies for FCVs, a review of the research status of DC-DC boost converters based on an impedance network is presented. Additionally, an evaluation system for DC-DC topologies for FCVs is constructed, providing a reference for designing wide input range and high-gain boost converters. The evaluation system uses eight indexes to comprehensively evaluate the performance of DC-DC boost converters for FCVs. On this basis, issues about DC-DC converters for FCVs are discussed, and future research directions are proposed. The main future research directions of DC-DC converter for FCVs include utilizing a DC-DC converter to realize online monitoring of the water content in FCs and designing buck-boost DC-DC converters suitable for high-power commercial FCVs.

SARS-CoV-2 McGill Nextera Flex sequencing protocol_Lunascript_ARTIC.V3_5uLRT v1

How the Nextera DNA Flex Assay Works The Nextera DNA Flex library prep kit uses a bead-based transposome complex to tagment genomic DNA, which is a process that fragments DNA and then tags the DNA with adapter sequences in one step. After it is saturated with input DNA, the bead-based transposome complex fragments a set number of DNA molecules. This fragmentation provides flexibility to use a wide DNA input range to generate normalized libraries of consistent tight fragment size distribution. Following tagmentation, a limited-cycle PCR adds Nextera DNA Flex-specific index adapter sequences to the ends of a DNA fragment. This step enables capability across all Illumina sequencing platforms. A subsequent Sample Purification Beads (SPB) cleanup step then purifies libraries for use on an Illumina sequencer. The double-stranded DNAlibrary is denatured before hybridization of the biotin probe oligonucleotide pool. PCR Amplicons for Nextera Flex When starting with PCR amplicons, the PCR amplicon must be > 150 bp. The standard clean up protocol depletes libraries < 500 bp. Therefore, Illumina recommends that amplicons < 500 bp undergo a 1.8 x sample purification bead volume ratio to supernatant during Clean Up Libraries on page 11. Shorter amplicons can otherwise be lost during the library cleanup step. Tagmentation cannot add an adapter directly to the distal end of a fragment, so a drop in sequencing coverage of ~50 bp from each distal end is expected. To ensure sufficient coverage of the amplicon target region, design primers to extend beyond the target region by 50 bp per end. More information can be found here: https://emea.support.illumina.com/content/dam/illumina-support/documents/documentation/chemistry_documentation/samplepreps_nextera/nextera_dna_flex/nextera-dna-flex-library-prep-reference-guide-1000000025416-07.pdf

A Novel Rail-to-Rail Input Swing Threshold-Inverter Multi-Bit Quantizer Using Interpolation Technique for Sampled-Data Circuits

In this paper, a novel and simple multi-bit quantizer based on the threshold inverter quantization (TIQ) approach is presented for use in sampled-data circuits. The key part is a front-end signal conditioning circuit with the aid of the interpolation technique that makes it possible to realize a rail-to-rail input range operation over the conventional threshold inverter-based quantizer circuits while maintaining the benefits of the TIQ structure without employing any analog-intensive circuits such as current sources or amplifiers, thus achieving a digital-compatible implementation. Simulation results in TSMC 90-nm CMOS technology at a power-supply voltage of 1[Formula: see text]V confirm the efficient performance of the proposed circuit.

Determine The Suitable Heat Input Range for Butt Joint Made by Heat Resistance Stainless Steel SUS316L by Using the Numerical Simulation

One of the methods for reducing the production costs to increase competitiveness is to minimize waste products as well as the cost of testing products, and numerical simulation is a useful tool to solve this task. In this study, the authors use SYSWELD software to compute in advance the suitable heat input range to weld specific layers in heat-resistant stainless steel butt welded joints in chemical plants, oil and gas, and energy. The simulation results show that with the butt-welded joint made by SUS316L steel in 8 mm thick and welded by the MIG welding process, the appropriate heat input of the root pass is 506 J/mm ≤ qđl ≤ 650 J/mm and the heat input suitable for cap pass is 754 J/mm ≤ qđl ≤ 1066 J/mm.

Unity-Gain Zero-Offset CMOS Buffer with Improved Feedforward Path

A voltage unity-gain zero-offset CMOS amplifier with reduced gain error and increased PSRR (power supply rejection ratio) is proposed. The amplifier uses two feed mechanisms, negative feedback and supporting positive feedforward, to achieve low deviation from unit gain over the entire input range. The circuit, designed in a standard 180-nanometer 1.8-voltage CMOS process, is compared with two known buffers of similar topology, also designed in the same process. Simulations show that, with the same supply (1.8 V), power (1.2 mW), load (12 pF), bandwidth (50 MHz), and similar area (600 µm2), the proposed buffer achieves the lowest gain error (0.3%) and the highest PSRR (72 dB).