Multi-layer probe card design with signal/power integrity for wafer-level AP test in LPDDR4 channel

2016 ◽  
Author(s):  
Jinwook Song ◽  
Jonghoon Kim ◽  
Shinyoung Park ◽  
Eunjung Lee ◽  
Joungho Kim ◽  
...  
Keyword(s):  
Signal Power ◽  
Power Integrity ◽  
Wafer Level ◽  
Probe Card

Novel RDL Design of Wafer-Level Packaging for Signal/Power Integrity in LPDDR4 Application

2018 ◽  
Vol 8 (8) ◽  
pp. 1431-1439 ◽  
Author(s):  
Kai-Bin Wu ◽  
Tsung-Yi Kuo ◽  
Cheng-Chou Hung ◽  
Benson Lin ◽  
I-Hsuan Peng ◽  
...  
Keyword(s):  
Signal Power ◽  
Power Integrity ◽  
Wafer Level ◽  
Wafer Level Packaging

Signal/Power Integrity Co-Simulation of DDR3 Memory Module

2018 ◽  
Author(s):  
Chao-Kai Chan ◽  
Tsung-Ming Wu ◽  
Meng-Lin Wu ◽  
Gang-Jhih Fan ◽  
Chun Shiah ◽  
...  
Keyword(s):  
Signal Power ◽  
Power Integrity ◽  
Memory Module
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