Real-time threshold-voltage control scheme for low-power VLSI under fluctuation of a supply voltage

Author(s):  
A. Shaheer ◽  
M. Kameyama
Author(s):  
K. Akynin ◽  
◽  
O. Antonov ◽  
V. Kireiev ◽  
◽  
...  

2013 ◽  
Vol 7 (3) ◽  
pp. 1155-1165
Author(s):  
Dayadi Lakshmaiah ◽  
Dr. M.V. Subramanyam ◽  
Dr. K.Sathya Prasad

This paper process a novel design for low power 1-bit CMOS full adder using XNOR and MUX, with reduced number of transistors using GDI cell. The circuits were simulated with supply voltage scaling from 1.2V to 0.6V &0.6V to 0.3V. To achieve the desired performance of power delay product, area, capacitance the transistors with low threshold voltage were used at critical paths and high threshold voltage at non critical paths. The results show the efficiency of the proposed technique in terms of power consumption, delay and area.


2006 ◽  
Vol 3 (21) ◽  
pp. 453-458 ◽  
Author(s):  
Masaaki Iijima ◽  
Kenji Hamada ◽  
Masayuki Kitamura ◽  
Masahiro Numa ◽  
Akira Tada ◽  
...  

NORCHIP 2012 ◽  
2012 ◽  
Author(s):  
W. Gut ◽  
G. Hilber ◽  
D. Gruber ◽  
M. Kaufmann ◽  
A. Rauchenecker ◽  
...  

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