Contacting Interdigitated Back-Contact Solar Cells With Four Busbars for Precise Current–Voltage Measurements Under Standard Testing Conditions

2012 ◽  
Vol 2 (3) ◽  
pp. 247-255 ◽  
Author(s):  
Carsten Schinke ◽  
Fabian Kiefer ◽  
Matthias Offer ◽  
David Hinken ◽  
Arne Schmidt ◽  
...  
2007 ◽  
Vol 1012 ◽  
Author(s):  
Vincent Barrioz ◽  
Yuri Y. Proskuryakov ◽  
Eurig W. Jones ◽  
Jon D. Major ◽  
Stuart J.C. Irvine ◽  
...  

AbstractIn an effort to overcome the lack of a suitable metal as an ohmic back contact for CdTe solar cells, a study was carried out on the potential for using a highly arsenic (As) doped CdTe layer with metallization. The deposition of full CdTe/CdS devices, including the highly doped CdTe:As and the CdCl2 treatment, were carried out by metal organic chemical vapour deposition (MOCVD), in an all-in-one process with no etching being necessary. They were characterized and compared to control devices prepared using conventional bromine-methanol back contact etching. SIMS and C-V profiling results indicated that arsenic concentrations of up to 1.5 × 1019 at·cm-3 were incorporated in the CdTe. Current-voltage (J-V) characteristics showed strong improvements, particularly in the open-circuit voltage (Voc) and series resistance (Rs): With a 250 nm thick doped layer, the series resistance was reduced from 9.8 Ω·cm2 to 1.6 Ω·cm2 for a contact area of 0.25 cm2; the J-V curves displayed no rollover, while the Voc increased by up to 70 mV (~ 12 % rise). Preliminary XRD data show that there may be an As2Te3 layer at the CdTe surface which could be contributing to the low barrier height of this contact.


Optik ◽  
2020 ◽  
Vol 207 ◽  
pp. 164362 ◽  
Author(s):  
Guochuan Fang ◽  
Hanmin Tian ◽  
Weihong Chang ◽  
Zheng Wang ◽  
Quanmin He ◽  
...  

Solar RRL ◽  
2021 ◽  
Author(s):  
Anh Dinh Bui ◽  
Md Arafat Mahmud ◽  
Naeimeh Mozaffari ◽  
Rabin Basnet ◽  
The Duong ◽  
...  

2020 ◽  
Vol 3 (11) ◽  
pp. 10976-10982
Author(s):  
Afei Zhang ◽  
Zhaoyang Song ◽  
Zhengji Zhou ◽  
Yueqing Deng ◽  
Wenhui Zhou ◽  
...  

2016 ◽  
Vol 845 ◽  
pp. 224-227 ◽  
Author(s):  
Danila Saranin ◽  
Marina Orlova ◽  
Sergey Didenko ◽  
Oleg Rabinovich ◽  
Andrey Kryukov

This article presents the results of research output voltage characteristics of solar cells on an organic basis with the use of P3HT: PCBM system. There were produced organic solar cells in a coating in air, current-voltage characteristics were measured. It was determined the characteristic influence of a substrate cleaning and annealing temperature of layers applied on fill factor and conversion efficiency.


2006 ◽  
Vol 910 ◽  
Author(s):  
Qi Wang ◽  
Matt P. Page ◽  
Eugene Iwancizko ◽  
Yueqin Xu ◽  
Yanfa Yan ◽  
...  

AbstractWe have achieved an independently-confirmed 17.8% conversion efficiency in a 1-cm2, p-type, float-zone silicon (FZ-Si) based heterojunction solar cell. Both the front emitter and back contact are hydrogenated amorphous silicon (a-Si:H) deposited by hot-wire chemical vapor deposition (HWCVD). This is the highest reported efficiency for a HWCVD silicon heterojunction (SHJ) solar cell. Two main improvements lead to our most recent increases in efficiency: 1) the use of textured Si wafers, and 2) the application of a-Si:H heterojunctions on both sides of the cell. Despite the use of textured c-Si to increase the short-circuit current, we were able to maintain the same 0.65 V open-circuit voltage as on flat c-Si. This is achieved by coating a-Si:H conformally on the c-Si surfaces, including covering the tips of the anisotropically-etched pyramids. A brief atomic H treatment before emitter deposition is not necessary on the textured wafers, though it was helpful in the flat wafers. It is essential to high efficiency SHJ solar cells that the emitter grows abruptly as amorphous silicon, instead of as microcrystalline or epitaxial Si. The contact on each side of the cell comprises a thin (< 5 nm) low substrate temperature (~100°C) intrinsic a-Si:H layer, followed by a doped layer. Our intrinsic layers are deposited at 0.3-1.2 nm/s. The doped emitter and back-contact layers were deposited at a higher temperature (>200°C) and grown from PH3/SiH4/H2 and B2H6/SiH4/H2 doping gas mixtures, respectively. This combination of low (intrinsic) and high (doped layer) growth temperatures was optimized by lifetime and surface recombination velocity measurements. Our rapid efficiency advance suggests that HWCVD may have advantages over plasma-enhanced (PE) CVD in fabrication of high-efficiency heterojunction c-Si cells; there is no need for process optimization to avoid plasma damage to the delicate, high-quality, Si wafers.


2002 ◽  
Vol 41 (Part 1, No. 5A) ◽  
pp. 2834-2841 ◽  
Author(s):  
Nowshad Amin ◽  
Akira Yamada ◽  
Makoto Konagai

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