An Unassisted, Low Trigger-, and High Holding-Voltage SCR (uSCR) for On-Chip ESD-Protection Applications

2007 ◽  
Vol 28 (12) ◽  
pp. 1120-1122 ◽  
Author(s):  
Lifang Lou ◽  
Juin J. Liou
Keyword(s):  
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On Chip

P-45: On-Chip ESD Protection Design for UXGA/HDTV LCoS in 0.35-μm CMOS Technology

2004 ◽  
Vol 35 (1) ◽  
pp. 404
Author(s):  
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Shih-Hung Chen ◽  
Tang-Kui Tseng
Keyword(s):  
Cmos Technology ◽  
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scholarly journals Systematic Characterization of Graphene ESD Interconnects for On-Chip ESD Protection

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Vol 63 (8) ◽  
pp. 3205-3212 ◽  
Author(s):  
Qi Chen ◽  
Rui Ma ◽  
Wei Zhang ◽  
Fei Lu ◽  
Chenkun Wang ◽  
...  
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Challenges & Physical Insights Into the Design of Fin-Based SCRs and a Novel Fin-SCR for Efficient On-Chip ESD Protection

2018 ◽  
Vol 65 (11) ◽  
pp. 4755-4763 ◽  
Author(s):  
Milova Paul ◽  
B. Sampath Kumar ◽  
Christian Russ ◽  
Harald Gossner ◽  
Mayank Shrivastava
Keyword(s):  
Esd Protection ◽  
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ON-CHIP ESD PROTECTION FOR RFICS

2007 ◽  
pp. 173-192
Author(s):  
Elyse Rosenbaum ◽  
Sami Hyvonen
Keyword(s):  
Esd Protection ◽  
On Chip
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