ESD Implantations for On-Chip ESD Protection With Layout Consideration in 0.18-<tex>$muhbox m$</tex>Salicided CMOS Technology

IEEE Transactions on Semiconductor Manufacturing ◽

10.1109/tsm.2005.845100 ◽

2005 ◽

Vol 18 (2) ◽

pp. 328-337 ◽

Author(s):

M.-D. Ker ◽

C.-H. Chuang ◽

W.-Y. Lo

Keyword(s):

Cmos Technology ◽

Esd Protection ◽

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P-45: On-Chip ESD Protection Design for UXGA/HDTV LCoS in 0.35-μm CMOS Technology

SID Symposium Digest of Technical Papers ◽

10.1889/1.1830999 ◽

2004 ◽

Vol 35 (1) ◽

pp. 404

Author(s):

Ming-Dou Ker ◽

Shih-Hung Chen ◽

Tang-Kui Tseng

Keyword(s):

Cmos Technology ◽

Esd Protection ◽

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On-chip ESD protection design by using polysilicon diodes in CMOS technology for smart card application

Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476) ◽

10.1109/eosesd.2000.890086 ◽

2002 ◽

Author(s):

Tai-Ho Wang ◽

Ming-Dou Ker

Keyword(s):

Cmos Technology ◽

Esd Protection ◽

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New design concept for on-chip ESD protection circuits with already-on device in nanoscale CMOS technology

The 2004 IEEE Asia-Pacific Conference on Circuits and Systems, 2004. Proceedings. ◽

10.1109/apccas.2004.1413010 ◽

2005 ◽

Author(s):

Ming-Dou Ker ◽

Kuo-Chun Hsu

Keyword(s):

Cmos Technology ◽

Design Concept ◽

Nanoscale Cmos ◽

Esd Protection ◽

Protection Circuits ◽

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ESD implantations in 0.18-μm salicided CMOS technology for on-chip ESD protection with layout consideration

Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548) ◽

10.1109/ipfa.2001.941461 ◽

2002 ◽

Author(s):

Ming-Dou Ker ◽

Che-Hao Chuang

Keyword(s):

Cmos Technology ◽

Esd Protection ◽

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Design of a Distributed Amplifier with On-chip ESD Protection Circuit in 130 nm SOI CMOS Technology

2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems ◽

10.1109/smic.2007.322782 ◽

2007 ◽

Author(s):

M. Moussa ◽

M. Kaamouchi ◽

G. Wybo ◽

A. Bens ◽

J.-p. Raskin ◽

...

Keyword(s):

Cmos Technology ◽

Distributed Amplifier ◽

Esd Protection ◽

Protection Circuit ◽

On Chip ◽

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Optimization of PMOS-triggered SCR devices for on-chip ESD protection in a 0.18-μm CMOS technology

2007 14th International Symposium on the Physical and Failure Analysis of Integrated Circuits ◽

10.1109/ipfa.2007.4378093 ◽

2007 ◽

Author(s):

Shih-Hung Chen ◽

Ming-Dou Ker

Keyword(s):

Cmos Technology ◽

Esd Protection ◽

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On-Chip ESD Protection Device for High-Speed I/O Applications in CMOS Technology

IEEE Transactions on Electron Devices ◽

10.1109/ted.2017.2734059 ◽

2017 ◽

Vol 64 (10) ◽

pp. 3979-3985 ◽

Author(s):

Jie-Ting Chen ◽

Chun-Yu Lin ◽

Ming-Dou Ker

Keyword(s):

Cmos Technology ◽

Protection Device ◽

Esd Protection ◽

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Vertical SCR structure for on-chip ESD protection in nanoscale CMOS technology

2015 IEEE 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits ◽

10.1109/ipfa.2015.7224380 ◽

2015 ◽

Author(s):

Chun-Yu Lin ◽

Pin-Hsin Chang ◽

Rong-Kun Chang ◽

Ming-Dou Ker ◽

Wen-Tai Wang

Keyword(s):

Cmos Technology ◽

Nanoscale Cmos ◽

Esd Protection ◽

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On-Chip ESD Protection Strategies for RF Circuits in CMOS Technology

2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings ◽

10.1109/icsict.2006.306371 ◽

2006 ◽

Author(s):

Ming-dou Ker ◽

Yuan-wen Hsiao

Keyword(s):

Rf Circuits ◽

Cmos Technology ◽

Esd Protection ◽

Protection Strategies ◽

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The Impact of Drift Implant and Layout Parameters on ESD Robustness for On-Chip ESD Protection Devices in 40-V CMOS Technology

IEEE Transactions on Device and Materials Reliability ◽

10.1109/tdmr.2007.901185 ◽

2007 ◽

Vol 7 (2) ◽

pp. 324-332 ◽

Author(s):

Wei-Jen Chang ◽

Ming-Dou Ker

Keyword(s):

Cmos Technology ◽

Esd Protection ◽

Protection Devices ◽

On Chip ◽

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