A Ku-Band Interference-Rejection CMOS Low-Noise Amplifier Using Current-Reused Stacked Common-Gate Topology

2007 ◽  
Vol 17 (10) ◽  
pp. 718-720 ◽  
Author(s):  
Wen-Lin Chen ◽  
Sheng-Fuh Chang ◽  
Guo-Wei Huang ◽  
Yuh-Sheng Jean ◽  
Ta-Hsun Yeh
2009 ◽  
Vol 37 (2) ◽  
pp. 257-281 ◽  
Author(s):  
Jouni Kaukovuori ◽  
Mikko Kaltiokallio ◽  
Jussi Ryynänen

2017 ◽  
Vol 7 (1.3) ◽  
pp. 69
Author(s):  
M. Ramana Reddy ◽  
N.S Murthy Sharma ◽  
P. Chandra Sekhar

The proposed work shows an innovative designing in TSMC 130nm CMOS technology. A 2.4 GHz common gate topology low noise amplifier (LNA) using an active inductor to attain the low power consumption and to get the small chip size in layout design. By using this Common gate topology achieves the noise figure of 4dB, Forward gain (S21) parameter of 14.7dB, and the small chip size of 0.26 mm, while 0.8mW power consuming from a 1.1V in 130nm CMOS gives the better noise figure and improved the overall performance.


2014 ◽  
Vol 80 (1) ◽  
pp. 33-37 ◽  
Author(s):  
Sanghyun Woo ◽  
Jin Shao ◽  
Hyoungsoo Kim

2016 ◽  
Vol 90 (3) ◽  
pp. 573-589 ◽  
Author(s):  
Sriharsha Ankathi ◽  
Sriramula Vignan ◽  
Srikanth Athukuri ◽  
Smrithi Mohan ◽  
Karthigha Balamurugan ◽  
...  

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