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A 12-Bit ENOB 8MHz BW Noise-Shaping SAR ADC Using High-Speed Switches
2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS)
◽
10.1109/mwscas.2018.8624111
◽
2018
◽
Cited By ~ 1
Author(s):
Zhiyuan Dai
◽
Hang Hu
◽
Yongzhen Chen
◽
Fan Ye
◽
Junyan Ren
Keyword(s):
High Speed
◽
Sar Adc
◽
Noise Shaping
Download Full-text
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Cited By
References
An 84 dB dynamic range 62.5–625 kHz bandwidth clock-scalable noise-shaping SAR ADC with open-loop integrator using dynamic amplifier
2017 IEEE Custom Integrated Circuits Conference (CICC)
◽
10.1109/cicc.2017.7993655
◽
2017
◽
Cited By ~ 12
Author(s):
Masaya Miyahara
◽
Akira Matsuzawa
Keyword(s):
Dynamic Range
◽
Open Loop
◽
Sar Adc
◽
Noise Shaping
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A 1st-Order Passive Noise-Shaping SAR ADC with Improved NTF Assisted by Comparator Gain Calibration
2021 IEEE International Symposium on Circuits and Systems (ISCAS)
◽
10.1109/iscas51556.2021.9401115
◽
2021
◽
Author(s):
Hanrui Zhang
◽
Nannan Li
◽
Zihao Jiao
◽
Jie Zhang
◽
Xiaofei Wang
◽
...
Keyword(s):
Sar Adc
◽
Noise Shaping
◽
Passive Noise
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OTA-Free MASH 2–2 Noise Shaping SAR ADC: System and Design Considerations
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
◽
10.1109/iscas45731.2020.9180832
◽
2020
◽
Author(s):
Masoume Akbari
◽
Mohammad Honarparvar
◽
Yvon Savaria
◽
Mohamad Sawan
Keyword(s):
Sar Adc
◽
Noise Shaping
◽
Design Considerations
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A Comparator-Reused Dynamic-Amplifier for Noise-Shaping SAR ADC
2019 IEEE 13th International Conference on ASIC (ASICON)
◽
10.1109/asicon47005.2019.8983604
◽
2019
◽
Author(s):
Longheng Luo
◽
Xingchen Shen
◽
Jianguo Diao
◽
Fan Ye
◽
Junyan Ren
Keyword(s):
Sar Adc
◽
Noise Shaping
Download Full-text
Time-interleaved Noise-shaping SAR ADC based on CIFF Architecture with Redundancy Error Correction Technique
JSTS Journal of Semiconductor Technology and Science
◽
10.5573/jsts.2021.21.5.297
◽
2021
◽
Vol 21
(5)
◽
pp. 297-303
Author(s):
Ki-Hyun Kim
◽
Ji-Hyun Baek
◽
Jong-Hyun Kim
◽
Hyung-Il Chae
Keyword(s):
Error Correction
◽
Sar Adc
◽
Noise Shaping
◽
Correction Technique
◽
Time Interleaved
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Considerations for Design of High Speed High Resolution Low Power SAR ADC for Direct RF Sampling Receivers
10.1109/icort52730.2021.9581884
◽
2021
◽
Author(s):
Amitesh Kumar Tripathi
Keyword(s):
High Resolution
◽
Low Power
◽
High Speed
◽
Sar Adc
◽
Rf Sampling
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A 2.4-mW 25-MHz BW 300-MS/s passive noise shaping SAR ADC with noise quantizer technique in 14-nm CMOS
2017 Symposium on VLSI Circuits
◽
10.23919/vlsic.2017.8008491
◽
2017
◽
Cited By ~ 7
Author(s):
Ying-Zu Lin
◽
Chih-Hou Tsai
◽
Shan-Chih Tsou
◽
Rong-Xing Chu
◽
Chao-Hsin Lu
Keyword(s):
Sar Adc
◽
Noise Shaping
◽
Passive Noise
Download Full-text
Design Considerations and Evaluation of a High-Speed SAR ADC
2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
◽
10.1109/norchip.2018.8573500
◽
2018
◽
Author(s):
Victor Aberg
◽
Christian Fager
◽
Lars Svensson
Keyword(s):
High Speed
◽
Sar Adc
◽
Design Considerations
Download Full-text
Design of a current steering DAC for a high speed current mode SAR ADC
2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)
◽
10.1109/icecs.2013.6815449
◽
2013
◽
Cited By ~ 5
Author(s):
Abdelrahman Elkafrawy
◽
Jens Anders
◽
Timon Bruckner
◽
Maurits Ortmanns
Keyword(s):
High Speed
◽
Current Mode
◽
Sar Adc
◽
Current Steering
◽
Current Steering Dac
◽
A Current
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Design of a High-Speed Time-Interleaved Sub-Ranging SAR ADC With Optimal Code Transfer Technique
IEEE Transactions on Circuits and Systems I Regular Papers
◽
10.1109/tcsi.2018.2866958
◽
2019
◽
Vol 66
(2)
◽
pp. 489-501
Author(s):
Dezhi Xing
◽
Yan Zhu
◽
Chi-Hang Chan
◽
Franco Maloberti
◽
Seng-Pan U
◽
...
Keyword(s):
High Speed
◽
Sar Adc
◽
Optimal Code
◽
Time Interleaved
Download Full-text
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