Design of a current steering DAC for a high speed current mode SAR ADC

Author(s):  
Abdelrahman Elkafrawy ◽  
Jens Anders ◽  
Timon Bruckner ◽  
Maurits Ortmanns
2008 ◽  
Vol 6 ◽  
pp. 201-204 ◽  
Author(s):  
R. Kolm ◽  
H. Zimmermann

Abstract. For software radio applications in system-on-chips, a 3rd-order current-mode Butterworth filter in 120 nm CMOS is realized. This filter is used for reconstruction purposes between a current-steering DAC and a current-mode mixer. Power can be reduced by using a current-mode architecture. The cut-off frequency of this filter is switchable between 1 MHz and 4 MHz, the current consumption is 4.5 mA at VDD=1.5 V, the inband noise density is 100 pA/√Hz and it has a dynamic range up to 65 dB.


Author(s):  
Jayeshkumar J. Patel ◽  
Amisha P. Naik

A compact current-mode Digital-to-Analog converter (DAC) suitable for biomedical application is repesented in this paper .The designed DAC is binary weighted in 180nm CMOS technology with 1.8V supply voltage. In this implementation, authors have focused on calculaton of Non linearity error say INL and DNL for 4 bit DAC having various type of switches: NMOS, PMOS and Transmission Gate. The implemented DAC uses lower area and power compared to unary architecture due to absence of digital decoders. The desired value of Integrated non linearity (INL) and Differential non linearity (DNL) for DAC for are within a range of +0.5LSB. Result obtained in this works for INL and DNL for the case DAC using Transmission Gate is +0.34LSB and +0.38 LSB respectively with 22mW power dissipation.


2016 ◽  
Vol 89 (2) ◽  
pp. 411-415 ◽  
Author(s):  
Georgi Panov ◽  
Angel Popov ◽  
Georgy Mihov

2009 ◽  
Vol 30 (10) ◽  
pp. 105006 ◽  
Author(s):  
Yu Jinshan ◽  
Fu Dongbing ◽  
Li Ruzhang ◽  
Yao Yafeng ◽  
Yan Gang ◽  
...  

2007 ◽  
Vol E90-C (4) ◽  
pp. 877-884 ◽  
Author(s):  
W. CHEN ◽  
J. BAUWELINCK ◽  
P. OSSIEUR ◽  
X.-Z. QIU ◽  
J. VANDEWEGE

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