Economy motivated increase of DC time constants in power systems and consequences for fault current interruption

Author(s):  
R.P.P. Smeets ◽  
A.G.A. Lathouwers
2007 ◽  
Vol 17 (2) ◽  
pp. 2347-2350 ◽  
Author(s):  
M. Stemmle ◽  
C. Neumann ◽  
F. Merschel ◽  
U. Schwing ◽  
K.-H. Weck ◽  
...  

2018 ◽  
Vol 8 (11) ◽  
pp. 2059 ◽  
Author(s):  
Seyed Naderi ◽  
Pooya Davari ◽  
Dao Zhou ◽  
Michael Negnevitsky ◽  
Frede Blaabjerg

The doubly-fed induction generator has significant features compared to the fixed speed wind turbine, which has popularised its application in power systems. Due to partial rated back-to-back converters in the doubly-fed induction generator, fault ride-through capability improvement is one of the important subjects in relation to new grid code requirements. To enhance the fault ride-through capability of the doubly-fed induction generator, many studies have been carried out. Fault current limiting devices are one of the techniques utilised to limit the current level and protect the switches, of the back-to-back converter, from over-current damage. In this paper, a review is carried out based on the fault current limiting characteristic of fault current limiting devices, utilised in the doubly-fed induction generator. Accordingly, fault current limiters and series dynamic braking resistors are mainly considered. Operation of all configurations, including their advantages and disadvantages, is explained. Impedance type and the location of the fault current limiting devices are two important factors, which significantly affect the behaviour of the doubly-fed induction generator in the fault condition. These two factors are studied by way of simulation, basically, and their effects on the key parameters of the doubly-fed induction generator are investigated. Finally, future works, in respect to the application of the fault current limiter for the improvement of the fault ride-through of the doubly-fed induction generator, have also been discussed in the conclusion section.


2020 ◽  
Vol 13 (18) ◽  
pp. 4168-4175
Author(s):  
David Döring ◽  
Klaus Würflinger ◽  
Volker Staudt ◽  
Marcus Zeller ◽  
Günter Ebner

2019 ◽  
Vol 11 (16) ◽  
pp. 4493 ◽  
Author(s):  
Fazel Mohammadi ◽  
Gholam-Abbas Nazri ◽  
Mehrdad Saif

One of the major challenges toward the reliable and safe operation of the Multi-Terminal HVDC (MT-HVDC) grids arises from the need for a very fast DC-side protection system to detect, identify, and interrupt the DC faults. Utilizing DC Circuit Breakers (CBs) to isolate the faulty line and using a converter topology to interrupt the DC fault current are the two practical ways to clear the DC fault without causing a large loss of power infeed. This paper presents a new topology of a fast proactive Hybrid DC Circuit Breaker (HDCCB) to isolate the DC faults in MT-HVDC grids in case of fault current interruption, along with lowering the conduction losses and lowering the interruption time. The proposed topology is based on the inverse current injection technique using a diode and a capacitor to enforce the fault current to zero. Also, in case of bidirectional fault current interruption, the diode and capacitor prevent changing their polarities after identifying the direction of fault current, and this can be used to reduce the interruption time accordingly. Different modes of operation of the proposed topology are presented in detail and tested in a simulation-based system. Compared to the conventional DC CB, the proposed topology has increased the breaking current capability, and reduced the interruption time, as well as lowering the on-state switching power losses. To check and verify the performance and efficiency of the proposed topology, a DC-link representing a DC-pole of an MT-HVDC system is simulated and analyzed in the PSCAD/EMTDC environment. The simulation results verify the robustness and effectiveness of the proposed HDCCB in improving the overall performance of MT-HVDC systems and increasing the reliability of the DC grids.


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