Simulation, design and analysis of a low power MIMO-OFDM system and its implementation on FPGA

Author(s):  
Subhankar Bhattacharjee ◽  
Sanjib Sil ◽  
Sayan Dey ◽  
Amlan Chakrabarti
2014 ◽  
Vol 573 ◽  
pp. 176-180
Author(s):  
G. Kavitha ◽  
B. Kirthiga ◽  
N. Kirubanandasarathy

In this paper, an area-efficient low power fast fourier transform (FFT) processor is proposed for multi input multi output-orthogonal frequency division multiplexing (MIMO-OFDM) in wireless communication system. It consists of a modified architecture of radix-2 algorithm which is described as modified radix-2 multipath delay commutation (MOD-R2MDC). The OFDM receiver with modified R2MDC (MOD-R2MDC) FFT was designed by Hardware Description Language (HDL) coding The Xilinx ISE Design Suite 10.1 is used as a synthesis tool for getting the power and area. The Model-Sim 6.3c is used for simulation. Also the existing OFDM system has been tested with these FFT algorithms and their performances were analyzed with respect to occupancy area in FPGA and power consumption. A low-power and area efficient architecture enables the real-time operations of MIMO OFDM system.


2011 ◽  
Vol E94-B (12) ◽  
pp. 3540-3549
Author(s):  
Akinori NAKAJIMA ◽  
Kenichiro TANAKA ◽  
Akinori OHASHI ◽  
Hiroshi HATTORI ◽  
Akihiro OKAZAKI ◽  
...  

2013 ◽  
Vol E96.B (12) ◽  
pp. 3101-3107 ◽  
Author(s):  
Tatsuro YABE ◽  
Mamiko INAMORI ◽  
Yukitoshi SANADA

Author(s):  
Kazuhiko MITSUYAMA ◽  
Kohei KAMBARA ◽  
Takayuki NAKAGAWA ◽  
Tetsuomi IKEDA ◽  
Tomoaki OHTSUKI

Author(s):  
Hwan-Jun CHOI ◽  
Young-Hwan YOU ◽  
Hyoung-Kyu SONG

2010 ◽  
Vol 2010 (1) ◽  
pp. 146-150
Author(s):  
Jie-ling Wang ◽  
Hong Yang ◽  
Ke-chu Yi ◽  
Zu-jun Liu
Keyword(s):  

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