A 0.52 μW, 38 nV/Hz Chopper Amplifier with a Low-Noise DC Servo Loop, an Embedded Ripple Reduction Loop, and a Squeezed Inverter Stage

Author(s):  
Xuan Thanh Pham ◽  
Van-Nhan Nguyen ◽  
Jie-Seok Kim ◽  
Jong-Wook Lee
Electronics ◽  
2020 ◽  
Vol 9 (11) ◽  
pp. 1797
Author(s):  
Yuekai Liu ◽  
Zhijun Zhou ◽  
Yixin Zhou ◽  
Wenyuan Li ◽  
Zhigong Wang

The low-frequency and low-amplitude characteristics of neural signals poses challenges to neural signals recording. A low noise amplifier (LNA) plays an important role in the recording front-end. A chopper-stabilized analog front-end amplifier (FEA) for neural signal acquisition is presented in this paper. It solves the noise and offset interference caused by the servo loop in the chopper amplifier structure. The proposed FEA employs a switched-capacitor (SC) integrator with offset and low-frequency noise compensation. Moreover, a dc-blocking impedance is placed for ripple-rejection (RR), and a positive feedback loop is employed to increase input impedance. The proposed circuit is design in a 0.18-µm 1.8-V CMOS process. It achieves a bandwidth of up to 9 kHz for local field potential and action potential signals acquisition. The referred-to-input (RTI) noise is 0.72 µVrms in the 1 Hz~200 Hz frequency band and 3.46 µVrms in the 200 Hz~5 kHz frequency band. The noise effect factor is 0.43 (1 Hz~200 Hz) and 2.08 (200 Hz~5 kHz). CMRR higher than 87 dB and PSRR higher than 85 dB are achieved in the entire pass-band. It consumes a power of 3.96 µW/channel and occupies an area of 0.244 mm2/channel.


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