A High-Performance Energy-Efficient Architecture for FIR Adaptive Filter Based on New Distributed Arithmetic Formulation of Block LMS Algorithm

2013 ◽  
Vol 61 (4) ◽  
pp. 921-932 ◽  
Author(s):  
Basant K. Mohanty ◽  
Pramod Kumar Meher
Keyword(s):  
Adaptive Filter ◽  
Energy Efficient ◽  
High Performance ◽  
Lms Algorithm ◽  
Distributed Arithmetic ◽  
Energy Efficient Architecture

A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits

2019 ◽  
Vol 66 (1) ◽  
pp. 313-326 ◽  
Author(s):  
Honglan Jiang ◽  
Leibo Liu ◽  
Pieter P. Jonker ◽  
Duncan G. Elliott ◽  
Fabrizio Lombardi ◽  
...  
Keyword(s):  
Adaptive Filter ◽  
Energy Efficient ◽  
High Performance ◽  
Arithmetic Circuits ◽  
Distributed Arithmetic

Energy Efficient VLSI Based DCT Architecture with Accurate Error Compensation

2014 ◽  
Vol 626 ◽  
pp. 127-135 ◽  
Author(s):  
D. Jessintha ◽  
M. Kannan ◽  
P.L. Srinivasan
Keyword(s):  
Low Power ◽  
Energy Efficient ◽  
Time Complexity ◽  
High Performance ◽  
Low Power Consumption ◽  
Distributed Arithmetic ◽  
Technology Scaling ◽  
Truncation Errors ◽  
History Of ◽  
Technology Dependency

Discrete Cosine Transform (DCT) is commonly used in image compression. In the history of DCT, a milestone was the Distributed Arithmetic (DA) technique. Due to the technology dependency a multiplier-less computation was built with DA based technique. It occupied less area but the throughput is less. Later, due to the technology scaling, multiplier based architectures can be easily adapted for low-power and high-performance architecture. Fixed width multipliers [1]-[7] reduces hardware and time complexity. In this work, Radix 4 fixed width multiplier is adapted with DCT architecture due to low power consumption and saves 30% power. In order to reduce truncation errors caused during fixed width multiplication, an estimation circuit is designed based on conditional probability theory.

Challenges And Energy Efficient Techniques For High Performance Wireless Communications

2015 ◽  
Vol 1 (4) ◽  
pp. 1-12
Author(s):  
Chidadala Janardhan ◽  
◽  
Bhagath Pyda ◽  
J. Manohar ◽  
K. V. Ramanaiah ◽  
...  
Keyword(s):  
Wireless Communications ◽  
Energy Efficient ◽  
High Performance

scholarly journals Thread Batching for High-performance Energy-efficient GPU Memory Design

2019 ◽  
Vol 15 (4) ◽  
pp. 1-21
Author(s):  
Bing Li ◽  
Mengjie Mao ◽  
Xiaoxiao Liu ◽  
Tao Liu ◽  
Zihao Liu ◽  
...  
Keyword(s):  
Energy Efficient ◽  
High Performance ◽  
Memory Design

A novel high-performance and energy-efficient RRAM device with multi-functional conducting nanofilaments

Nano Energy ◽  
2021 ◽  
Vol 82 ◽  
pp. 105717
Author(s):  
Min-Ci Wu ◽  
Jui-Yuan Chen ◽  
Yi-Hsin Ting ◽  
Chih-Yang Huang ◽  
Wen-Wei Wu
Keyword(s):  
Energy Efficient ◽  
High Performance
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