Modified transmitted reference technique for multi-resolution radar timing and synchronization

Author(s):  
Jason Young ◽  
Ram M. Narayanan ◽  
David Jenkins
2013 ◽  
Vol 3 (1) ◽  
Author(s):  
Apratim Roy ◽  
A. Rashid

AbstractThis paper presents a threshold decision circuit with an adjustable detection window designed in a 90-nm IBM CMOS technology. Together with an RF mixer, the decision Section realizes the circuit implementation of the back-end of a transmitted reference ultra wideband receiver, which is yet to be reported in literature. The proposed circuit is built on a differential amplifier core and avoids the use of integrator and sampling blocks, which reduces the device burden necessary for the architecture. Moreover, the detection window threshold of the design can be regulated by three independent factors defined by the circuit elements. The circuit is tested at an input data rate of 0.1∼2.0 Gbps and the core decision section consumes 9.14 mW from a 1.2-V bias supply (with a maximum capacity/Pdc ratio of 218.8 GHz/W). When compared against other reported decision blocks, the proposed detection circuit shows improved performance in terms of capacity and power requirement.


2018 ◽  
Vol 106 (1) ◽  
pp. 160-172 ◽  
Author(s):  
Marijan Herceg ◽  
Denis Vranješ ◽  
Ratko Grbić ◽  
Josip Job

2010 ◽  
Vol 9 (6) ◽  
pp. 1837-1842 ◽  
Author(s):  
Shuyi Wang ◽  
Yunfei Chen ◽  
Mark Leeson ◽  
Norman Beaulieu

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