Experimental single-chip color HDTV image acquisition system with 8M-pixel CMOS image sensor

2006 ◽  
Author(s):  
Hiroshi Shimamoto ◽  
Takayuki Yamashita ◽  
Ryohei Funatsu ◽  
Kohji Mitani ◽  
Yuji Nojiri

2007 ◽  
Author(s):  
Hiroshi Shimamoto ◽  
Takayuki Yamashita ◽  
Ryohei Funatsu ◽  
Kohji Mitani ◽  
Yuji Nojiri


2012 ◽  
Vol 548 ◽  
pp. 710-713
Author(s):  
Shu Ping Xu ◽  
Fei Chen

The image acquisition and porcessing system is implemented by combining the embed technology and image technology.This image acquisition system use S3C44B0X which base on ARM for its core proeessing,make use of the CMOS image sensor to collect images,it stores the image data for the moment with FIFO, resolves the rate problem between ARM and the sensor.In the system,CPLD are taken advantage of. This set of equipment combines functions of image acquisting,image displaying and network transferring and has an excellent expansibility which easy to be developed secondly.



2014 ◽  
Vol 602-605 ◽  
pp. 2756-2760
Author(s):  
Yu Zhang ◽  
Chun Yang Wang

The system selected OmniVisiON company's CMOS chip OV7620, it is an integrated color camera chip, a 640 × 480 (300,000 pixels) image matrix. Considered that the CPLD control system is similar to the DMA mode of data transmission; Cypress's USB 2.0 chip is used by CY7C68013 chip. Finally, it is become the microcontroller firmware and device driver. The paper presents the design of Image acquisition system based on CMOS image sensor USB interface. Design an image acquisition and transmission system, and describes its firmware as well as the development of USB device drivers and PC-side application .



2016 ◽  
Vol 2016 (12) ◽  
pp. 1-7
Author(s):  
Tomohiro Nakamura ◽  
Ryohei Funatsu ◽  
Takahiro Yamasaki ◽  
Kazuya Kitamura ◽  
Hiroshi Shimamoto


2014 ◽  
Vol 989-994 ◽  
pp. 3861-3864
Author(s):  
Zhi Yu Hu ◽  
Li Li

The system selected OmniVisiON company's CMOS chip OV7620, it is an integrated color camera chip, a 640 × 480 (300,000 pixels) image matrix. Considered that the CPLD control system is similar to the DMA mode of data transmission; Cypress's USB 2.0 chip is used by CY7C68013 chip. Finally, it is become the microcontroller firmware and device driver. The paper presents the design of Image acquisition system based on CMOS image sensor USB interface. Design an image acquisition and transmission system, and describes its firmware as well as the development of USB device drivers and PC-side application.



2010 ◽  
Vol 39 ◽  
pp. 523-528
Author(s):  
Xin Hua Yang ◽  
Yuan Yuan Shang ◽  
Da Wei Xu ◽  
Hui Zhuo Niu

This paper introduces a design of a high-speed image acquisition system based on Avalon bus which is supported with SOPC technology. Some peripherals embedded in Avalon bus were customized and utilized in this system, such as imaging unit, decoding unit and storage unit, and these improved the speed of the whole imaging system. The data is compressed to three-fourths of the original by the decoding unit. A custom DMA is designed for moving the image data to the two caches of the SDRAM. This approach discards the method that FIFO must be put up in the traditional data acquisition system. And therefore, it reduced the CPU’s task for data moving. At the same time, the image acquisition and the data transmission can complete a parallel job. Finally, the design is worked on the high-speed image acquisition system which is made up of 2K*2K CMOS image sensor. And it improved the image acquisition speed by three ways: data encoding, custom DMA controller and the parallel processing.



2014 ◽  
Vol 668-669 ◽  
pp. 836-839
Author(s):  
Jun Chao Zhu ◽  
Yong Chen Li ◽  
Ying Kui Jiao ◽  
Zhi Jun Ma

It designs an image acquisition system of the camera based on FPGA. It uses a CMOS image sensor as the sensitive chip and controls the timing of image collection by designing the FPGA. FPGA transfers captured image into a PC to display. It uses the I2C bus to initiate CMOS sensor. A problem of cross-clock is solved by asynchronous FIFO. By the ping-pong operation based on two SDRAM chips to solve the problem of high speed data cache. The FPGA chip communicates signal data with PC by Ethernet port. The experiment proved that the system is able to collect 2048×1536 resolution images in a speed of 12fps.



2011 ◽  
Author(s):  
Ryohei Funatsu ◽  
Takayuki Yamashita ◽  
Kohji Mitani ◽  
Yuji Nojiri


Author(s):  
Hiroshi Shimamoto ◽  
Seiji Mitsuhashi ◽  
Tadami Mine ◽  
Ryohei Funatsu ◽  
Toshiya Kikkawa ◽  
...  


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