HUMAN BIO FUNCTIONS AS FPGAs CHIP DESIGN - AN INSULIN PERSPECTIVE

IAENG Transactions on Electrical Engineering Volume 1 ◽

10.1142/9789814439084_0022 ◽

2013 ◽

pp. 288-300

Author(s):

AMMAR EL HASSAN ◽

LOAY ALZUBAIDI ◽

JAAFAR AL GHAZO

Keyword(s):

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3D system-on-a-chip design with through-silicon-via-less power supply using highly doped silicon via

Japanese Journal of Applied Physics ◽

10.35848/1347-4065/ab7699 ◽

2020 ◽

Vol 59 (SG) ◽

pp. SGGL04

Author(s):

Kota Shiba ◽

Mototsugu Hamada ◽

Tadahiro Kuroda

Keyword(s):

Power Supply ◽

Chip Design ◽

Through Silicon Via ◽

Doped Silicon ◽

System On A Chip

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High performance VLSI CORDIC algorithms, architecture and chip design

Journal of the Chinese Institute of Engineers ◽

10.1080/02533839.1987.9677002 ◽

1987 ◽

Vol 10 (5) ◽

pp. 493-502

Author(s):

Tze‐Yun Sung ◽

Tai‐Ming Parng ◽

Yu‐Hen Hu

Keyword(s):

High Performance ◽

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Online multi-job mapping for photonic network on a chip design using partial migrations

Cluster Computing ◽

10.1007/s10586-021-03300-9 ◽

2021 ◽

Author(s):

Mahnaz Rafie ◽

Akram Reza

Keyword(s):

Chip Design ◽

Photonic Network ◽

Network On A Chip

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Accelerating Chip Design with Machine Learning

Proceedings of the 2020 ACM/IEEE Workshop on Machine Learning for CAD ◽

10.1145/3380446.3430690 ◽

2020 ◽

Author(s):

Brucek Khailany

Keyword(s):

Machine Learning ◽

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Chip Design in an Advanced CMOS Technology

10.1109/esscirc.1980.5468737 ◽

1980 ◽

Author(s):

W. N. Grant ◽

D. L. Kushler ◽

C. M. Lee

Keyword(s):

Cmos Technology ◽

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ATM AAL-2 chip design for video applications over ATM network

Proceedings of International Conference on Communication Technology. ICCT '96 ◽

10.1109/icct.1996.545062 ◽

2002 ◽

Author(s):

Yuan-Sun Chu ◽

Ching-Lung Chang ◽

Lian-Jyi Lin ◽

Kim-Joan Chen

Keyword(s):

Chip Design ◽

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A fault-tolerant network-on-chip design using dynamic reconfiguration of partial-faulty routing resources

2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip ◽

10.1109/vlsisoc.2011.6081674 ◽

2011 ◽

Author(s):

Zhiliang Qian ◽

Ying Fei Teh ◽

Chi-Ying Tsui

Keyword(s):

Fault Tolerant ◽

Dynamic Reconfiguration ◽

Network On Chip ◽

Chip Design ◽

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CAD system coordinates complete semicustom chip design

Microelectronics Reliability ◽

10.1016/0026-2714(84)90746-7 ◽

1984 ◽

Vol 24 (1) ◽

pp. 179

Keyword(s):

Chip Design ◽

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Bug identification of a real chip design by symbolic model checking

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC ◽

10.1109/edtc.1994.326886 ◽

2002 ◽

Author(s):

B. Chen ◽

M. Yamazaki ◽

M. Fujita

Keyword(s):

Model Checking ◽

Symbolic Model Checking ◽

Chip Design ◽

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Building a multi-FPGA-based emulation framework to support networks-on-chip design and verification

International Journal of Electronics ◽

10.1080/00207217.2010.512017 ◽

2010 ◽

Vol 97 (10) ◽

pp. 1241-1262 ◽

Author(s):

Yangfan Liu ◽

Peng Liu ◽

Yingtao Jiang ◽

Mei Yang ◽

Kejun Wu ◽

...

Keyword(s):

Support Networks ◽

Chip Design ◽

Networks On Chip ◽

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