scholarly journals Statistical estimation of the switching activity in digital circuits

1994 ◽  
Author(s):  
Michael G. Xakellis ◽  
Farid N. Najm
Keyword(s):  
Statistical Estimation ◽  
Digital Circuits ◽  
Switching Activity

scholarly journals FORSA: Exploiting Filter Ordering to Reduce Switching Activity for Low Power CNNs

2021 ◽  
Author(s):  
Yasmin Halawani ◽  
Baker Mohammad
Keyword(s):  
Digital Circuits ◽  
Matrix Multiplication ◽  
Temporal Distribution ◽  
Cross Coupling ◽  
Model Structure ◽  
Switching Activity ◽  
Data Set ◽  
Dynamic Power ◽  
Coupling Capacitance ◽  
Point Representation

<div>Switching activity in digital circuits depends on the temporal distribution of the data participating in the operation which directly influences the interconnect, dynamic power and timing of the system. This paper proposes an efficient method for reducing both power and latency of matrix-multiplication operations found in many applications like convolution neural networks (CNNs). The approach takes advantage of the unique characterizes of CNN with input stationary for efficient multiply-add operation. Since most application use reduce accuracy for MAC, the proposed work assumed 8-bit fixed point representation. As a demonstrator, CIFAR-10 data set has been used for end to end analysis of the filters on a 3-ConV with 2-FC model structure. The filters’ were re-ordered to reduce the switching behaviour between successive weight fetching. This directly impacts the dynamic power consumption and miraculously makes the classification activity reduces cross-coupling capacitance which helps improve timing and noise.</div>

Switching activity evaluation of CMOS digital circuits using logic timing simulation

2001 ◽  
Vol 37 (9) ◽  
pp. 555 ◽  
Author(s):  
J. Juan-Chico ◽  
M.J. Bellido ◽  
P. Ruiz-de-Clavijo ◽  
C. Baena ◽  
C.J. Jiménez ◽  
...  
Keyword(s):  
Digital Circuits ◽  
Switching Activity ◽  
Activity Evaluation ◽  
Timing Simulation

scholarly journals FORSA: Exploiting Filter Ordering to Reduce Switching Activity for Low Power CNNs

2021 ◽  
Author(s):  
Yasmin Halawani ◽  
Baker Mohammad
Keyword(s):  
Digital Circuits ◽  
Matrix Multiplication ◽  
Temporal Distribution ◽  
Cross Coupling ◽  
Model Structure ◽  
Switching Activity ◽  
Data Set ◽  
Dynamic Power ◽  
Coupling Capacitance ◽  
Point Representation

<div>Switching activity in digital circuits depends on the temporal distribution of the data participating in the operation which directly influences the interconnect, dynamic power and timing of the system. This paper proposes an efficient method for reducing both power and latency of matrix-multiplication operations found in many applications like convolution neural networks (CNNs). The approach takes advantage of the unique characterizes of CNN with input stationary for efficient multiply-add operation. Since most application use reduce accuracy for MAC, the proposed work assumed 8-bit fixed point representation. As a demonstrator, CIFAR-10 data set has been used for end to end analysis of the filters on a 3-ConV with 2-FC model structure. The filters’ were re-ordered to reduce the switching behaviour between successive weight fetching. This directly impacts the dynamic power consumption and miraculously makes the classification activity reduces cross-coupling capacitance which helps improve timing and noise.</div>

ALL-OPTICAL DIGITAL CIRCUITS

1988 ◽  
Vol 49 (C2) ◽  
pp. C2-459-C2-462 ◽  
Author(s):  
F. A.P. TOOLEY ◽  
B. S. WHERRETT ◽  
N. C. CRAFT ◽  
M. R. TAGHIZADEH ◽  
J. F. SNOWDON ◽  
...  
Keyword(s):  
Digital Circuits ◽  
All Optical
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