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Author(s):  
Julio Villalba ◽  
Javier Hormigo

AbstractThis article proposes a family of high-radix floating-point representation to efficiently deal with floating-point addition in FPGA devices with no native floating-point support. Since variable shifter implementation (required in any FP adder) has a very high cost in FPGA, high-radix formats considerably reduce the number of possible shifts, decreasing the execution time and area highly. Although the high-radix format produces also a significant penalty in the implementation of multipliers, the experimental results show that the adder improvement overweights the multiplication penalty for most of the practical and common cases (digital filters, matrix multiplications, etc.). We also provide the designer with guidelines on selecting a suitable radix as a function of the ratio between the number of additions and multiplications of the targeted algorithm. For applications with similar numbers of additions and multiplications, the high-radix version may be up to 26% faster and even having a wider dynamic range and using higher number of significant bits. Furthermore, thanks to the proposed efficient converters between the standard IEEE-754 format and our internal high-radix format, the cost of the input/output conversions in FPGA accelerators is negligible.


2021 ◽  
Author(s):  
Yasmin Halawani ◽  
Baker Mohammad

<div>Switching activity in digital circuits depends on the temporal distribution of the data participating in the operation which directly influences the interconnect, dynamic power and timing of the system. This paper proposes an efficient method for reducing both power and latency of matrix-multiplication operations found in many applications like convolution neural networks (CNNs). The approach takes advantage of the unique characterizes of CNN with input stationary for efficient multiply-add operation. Since most application use reduce accuracy for MAC, the proposed work assumed 8-bit fixed point representation. As a demonstrator, CIFAR-10 data set has been used for end to end analysis of the filters on a 3-ConV with 2-FC model structure. The filters’ were re-ordered to reduce the switching behaviour between successive weight fetching. This directly impacts the dynamic power consumption and miraculously makes the classification activity reduces cross-coupling capacitance which helps improve timing and noise.</div>


2021 ◽  
Author(s):  
Yasmin Halawani ◽  
Baker Mohammad

<div>Switching activity in digital circuits depends on the temporal distribution of the data participating in the operation which directly influences the interconnect, dynamic power and timing of the system. This paper proposes an efficient method for reducing both power and latency of matrix-multiplication operations found in many applications like convolution neural networks (CNNs). The approach takes advantage of the unique characterizes of CNN with input stationary for efficient multiply-add operation. Since most application use reduce accuracy for MAC, the proposed work assumed 8-bit fixed point representation. As a demonstrator, CIFAR-10 data set has been used for end to end analysis of the filters on a 3-ConV with 2-FC model structure. The filters’ were re-ordered to reduce the switching behaviour between successive weight fetching. This directly impacts the dynamic power consumption and miraculously makes the classification activity reduces cross-coupling capacitance which helps improve timing and noise.</div>


Author(s):  
Benjamin P Mastripolito ◽  
Nicholas A. Koskelo ◽  
Dylan A. Weatherred ◽  
David A Pimentel ◽  
Daniel G. Sheppard ◽  
...  

Abstract Applications often require a fast, single-threaded search algorithm over sorted data, typical in table-lookup operations. We explore various search algorithms for a large number of search candidates over a relatively small array of logarithmically-distributed sorted data. These include an innovative hash-based search that takes advantage of floating point representation to bin data by the exponent. Algorithms that can be optimized to take advantage of SIMD vector instructions are of particular interest. We then conduct a case study applying our results and analyzing algorithmic performance with the EOSPAC package. EOSPAC is a table look-up library for manipulation and interpolation of SESAME equation-of-state data. Our investigation results in a couple of algorithms with better performance with a best case eight times speedup over the original EOSPAC Hunt-and-Locate implementation. Our techniques should generalize to other instances of search algorithms seeking to get a performance boost from vectorization.


2021 ◽  
Vol 0 (0) ◽  
Author(s):  
A. Ayad ◽  
A. Khalifa ◽  
M. Fawy

Abstract This paper describes the development of an integrated approach for water pipe network calibration and quantifying leaks. The approach merges both field measurements and linear programming to pinpoint pipe leaks (physical losses); then applies Genetic Algorithms (GA) to identify faulty meters and meter thefts (apparent losses). Besides; throughout the process, GIS is used for input data integration and output representation. The developed model is based on GA but is different in its representation, introducing a new adaptive constraint handling function and a new mutation function. Also, the use of floating-point representation enables the calibration of a large number of unknown parameters without compromising the accuracy and precision of the solutions. While the newly introduced constraint handling function robust the solution towards a near level of agreement between real and calculated values. A pilot site is used to test the model and approach, comparing before and after field results to ensure accuracy. The model integrates EPAnet for the required hydraulic modeling during the simulation. The results prove the approach’s accuracy and efficiency.


Author(s):  
Zhumagul Zheentaeva

Formerly, in order to conduct the in-depth study of differential equations with delay, the author proposed the method of splitting the solution space reducing such equations to the systems of operator-difference equations. Using this method, the author assumed new conditions, i.e. the absolute domains for coefficients sufficient for the existence of special (slowly changing) solutions, and proved the presence of approximating and asymptotically approximating properties in them, as well as the asymptotic one-dimensional space of solutions of the initial problems for linear scalar differential equations with insignificantly retarded argument and the corresponding operator-difference equation systems (special solutions correspond, to the solutions with a slowly changing first component and a relatively small second component). For the purposes of the single-point representation of the obtained results and other data related to the theory of dynamic systems (the distance between the solution values tends to zero alongside the unlimited increase in argument), throughout this research paper the author uses the concept of the asymptotic equivalence of solutions for dynamic systems, as it was introduced by the author in their previous research. In order to shape the new mathematical objects, the concept of asymptotic Hausdorff equivalence of solutions for dynamic systems is introduced (the distance between solution values tends to zero with unlimited increase in argument of one solution and monotonic transformation of argument of another solution).


Energies ◽  
2021 ◽  
Vol 14 (6) ◽  
pp. 1589
Author(s):  
Krzysztof Kołek ◽  
Andrzej Firlit ◽  
Krzysztof Piątek ◽  
Krzysztof Chmielowiec

Monitoring power quality (PQ) indicators is an important part of modern power grids’ maintenance. Among different PQ indicators, flicker severity coefficients Pst and Plt are measures of voltage fluctuations. In state-of-the-art PQ measuring devices, the flicker measurement channel is usually implemented as a dedicated processor subsystem. Implementation of the IEC 61000-4-15 compliant flicker measurement algorithm requires a significant amount of computational power. In typical PQ analysers, the flicker measurement is usually implemented as a part of the meter’s algorithm performed by the main processor. This paper considers the implementation of the flicker measurement as an FPGA module to offload the processor subsystem or operate as an IP core in FPGA-based system-on-chip units. The measurement algorithm is developed and validated as a Simulink diagram, which is then converted to a fixed-point representation. Parts of the diagram are applied for automatic VHDL code generation, and the classifier block is implemented as a local soft-processor system. A simple eight-bit processor operates within the flicker measurement coprocessor and performs statistical operations. Finally, an IP module is created that can be considered as a flicker coprocessor module. When using the coprocessor, the main processor’s only role is to trigger the coprocessor and read the results, while the coprocessor independently calculates the flicker coefficients.


Mathematics ◽  
2021 ◽  
Vol 9 (5) ◽  
pp. 580
Author(s):  
Pavel Shcherbakov ◽  
Mingyue Ding ◽  
Ming Yuchi

Various Monte Carlo techniques for random point generation over sets of interest are widely used in many areas of computational mathematics, optimization, data processing, etc. Whereas for regularly shaped sets such sampling is immediate to arrange, for nontrivial, implicitly specified domains these techniques are not easy to implement. We consider the so-called Hit-and-Run algorithm, a representative of the class of Markov chain Monte Carlo methods, which became popular in recent years. To perform random sampling over a set, this method requires only the knowledge of the intersection of a line through a point inside the set with the boundary of this set. This component of the Hit-and-Run procedure, known as boundary oracle, has to be performed quickly when applied to economy point representation of many-dimensional sets within the randomized approach to data mining, image reconstruction, control, optimization, etc. In this paper, we consider several vector and matrix sets typically encountered in control and specified by linear matrix inequalities. Closed-form solutions are proposed for finding the respective points of intersection, leading to efficient boundary oracles; they are generalized to robust formulations where the system matrices contain norm-bounded uncertainty.


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