Comparison of angular-selective metasurfaces as tools for sub-THz single-frequency sensing

We demonstrate and numerically characterize a set of single-layer metasurfaces based on capacitively-coupled bent metal strips deposited on a thin polypropylene film operating as band-stop filters at 139.1 GHz. Due to a high inter-digital coupling capacitance between neighboring inclusions formed by the strips, the resonance of the metasurface becomes highly sensitive to the incidence angle of a plane wave. At the same time, a narrow-band resonance is achieved by reducing the conductor length along the vertical polarization direction of the incident wave. We propose to use both properties for designing a sensor, which analyses the thickness of a thin slab of a known substance deposited over the structure by tracking the angle at which the minimum of transmission can be measured at a single frequency. We compare three versions of the proposed geometry by numerical calculation of the transmission coefficient depending on both the incidence angle and analyte slab’s thickness. We select the most suitable structure for sensing.

FORSA: Exploiting Filter Ordering to Reduce Switching Activity for Low Power CNNs

<div>Switching activity in digital circuits depends on the temporal distribution of the data participating in the operation which directly influences the interconnect, dynamic power and timing of the system. This paper proposes an efficient method for reducing both power and latency of matrix-multiplication operations found in many applications like convolution neural networks (CNNs). The approach takes advantage of the unique characterizes of CNN with input stationary for efficient multiply-add operation. Since most application use reduce accuracy for MAC, the proposed work assumed 8-bit fixed point representation. As a demonstrator, CIFAR-10 data set has been used for end to end analysis of the filters on a 3-ConV with 2-FC model structure. The filters’ were re-ordered to reduce the switching behaviour between successive weight fetching. This directly impacts the dynamic power consumption and miraculously makes the classification activity reduces cross-coupling capacitance which helps improve timing and noise.</div>

FORSA: Exploiting Filter Ordering to Reduce Switching Activity for Low Power CNNs

<div>Switching activity in digital circuits depends on the temporal distribution of the data participating in the operation which directly influences the interconnect, dynamic power and timing of the system. This paper proposes an efficient method for reducing both power and latency of matrix-multiplication operations found in many applications like convolution neural networks (CNNs). The approach takes advantage of the unique characterizes of CNN with input stationary for efficient multiply-add operation. Since most application use reduce accuracy for MAC, the proposed work assumed 8-bit fixed point representation. As a demonstrator, CIFAR-10 data set has been used for end to end analysis of the filters on a 3-ConV with 2-FC model structure. The filters’ were re-ordered to reduce the switching behaviour between successive weight fetching. This directly impacts the dynamic power consumption and miraculously makes the classification activity reduces cross-coupling capacitance which helps improve timing and noise.</div>

Power and Ground Metal Insertion into Integrated Circuit Design Combined with Timing Aware Dummy Metal Fill Insertion

As dummy metal fill insertion is mandatory step for integrated circuits’ (IC) current manufacturing processes, many works are targeting better fill insertion with small coupling capacitance. However, with scaling technology trends, smaller IR drop is becoming more and more required, as its high value can lead to integrated circuit working failures. To ensure IR drop reduction, a new approach was proposed: while doing dummy fill insertion, firstly, metal shapes which are tied to power and ground nets were inserted and then timing aware dummy metal shapes were added. It has been established that power and ground metal fill shapes were creating shield layers, hence optimizing IR drop. Later it was found that timing aware dummy metal fill insertion was creating dummy metals for ensuring final metal ratio. Experiments have shown that with the use of proposed method, for 5 different designs IR drop has been reduced on average by about 11,9 %; however, placement and routing tool runtime has been increased by about 27,8 % and overall capacitance has been increased by about 4,4 %.

Capacitive-Coupling Impedance Spectroscopy Using a Non-Sinusoidal Oscillator and Discrete-Time Fourier Transform: An Introductory Study

In this study, we propose a new short-time impedance spectroscopy method with the following three features: (1) A frequency spectrum of complex impedance for the measured object can be obtained even when the measuring electrodes are capacitively coupled with the object and the precise capacitance of the coupling is unknown; (2) the spectrum can be obtained from only one cycle of the non-sinusoidal oscillation waveform without sweeping the oscillation frequency; and (3) a front-end measuring circuit can be built, simply and cheaply, without the need for a digital-to-analog (D-A) converter to synthesize elaborate waveforms comprising multiple frequencies. We built the measurement circuit using the proposed method and then measured the complex impedance spectra of 18 resistive elements connected in series with one of three respective capacitive couplings. With this method, each element’s resistance and each coupling’s capacitance were estimated independently and compared with their nominal values. When the coupling capacitance was set to 10 nF or 1.0 nF, estimated errors for the resistive elements in the range of 2.0–10.0 kΩ were less than 5%.

Crosstalk-Aware Global Routing in VLSI Design by Using a Shuffled Frog-Leaping Algorithm

Nowadays, very large scale integrated (VLSI) circuit technology is developing rapidly. It is necessary to consider many factors related to the VLSI circuit design. Interference is one of the factors that must be considered in high-frequency systems. The parasitic elements become serious limiting factors in the circuit. This research provided a method to reduce crosstalk energy by considering the transition of the signal. Crosstalk is the main capacitive effect which is elected by a high-coupling capacitance between lines. This study considers the wiring path signal with disturbance using the theory of optimization model, assisting in the search of the best sort in signal lines. The technique of a shuffled frog leaping algorithm (SFLA) is being used to search for the best value in arranged signal lines. The result will be minimal noise. The study finds that the arrangement using the SFLA causes only 36.42% of the noise. It was initially evident and 13.06%, when compared with the average all, is born noise value. These techniques can be applied in the design of arranging signal line in the VLSI circuits.