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INTB: A New FPGA Interconnect Model for Architecture Exploration
The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
◽
10.1145/3373087.3375372
◽
2020
◽
Author(s):
Chengyu Hu
◽
Qinghua Duan
◽
Peng Lu
◽
Wei Liu
◽
Jian Wang
◽
...
Keyword(s):
Architecture Exploration
Download Full-text
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References
A Fast Architecture Exploration Method for High Throughput IEEE 802.11e MAC Implementation Using SystemC
IEICE Transactions on Communications
◽
10.1587/transcom.e93.b.2833
◽
2010
◽
Vol E93-B
(10)
◽
pp. 2833-2836
Author(s):
Sung-Rok YOON
◽
Min Li HUANG
◽
Sangho SEO
◽
Hiroshi OCHI
◽
Sin-Chong PARK
Keyword(s):
High Throughput
◽
Ieee 802.11E
◽
Architecture Exploration
Download Full-text
Architecture exploration for ambient energy harvesting nonvolatile processors
2015 IEEE 21st International Symposium on High Performance Computer Architecture (HPCA)
◽
10.1109/hpca.2015.7056060
◽
2015
◽
Cited By ~ 110
Author(s):
Kaisheng Ma
◽
Yang Zheng
◽
Shuangchen Li
◽
Karthik Swaminathan
◽
Xueqing Li
◽
...
Keyword(s):
Energy Harvesting
◽
Architecture Exploration
Download Full-text
Architecture Exploration for a Reconfigurable Architecture Template
IEEE Design & Test of Computers
◽
10.1109/mdt.2005.27
◽
2005
◽
Vol 22
(2)
◽
pp. 90-101
◽
Cited By ~ 96
Author(s):
Bingfeng Mei
◽
A. Lambrechts
◽
D. Verkest
◽
J. Mignolet
◽
R. Lauwereins
Keyword(s):
Reconfigurable Architecture
◽
Architecture Exploration
Download Full-text
On the Statistical Memory Architecture Exploration and Optimization
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2015
◽
10.7873/date.2015.0839
◽
2015
◽
Cited By ~ 1
Author(s):
Charalampos Antoniadis
◽
Georgios Karakonstantis
◽
Nestor Evmorfopoulos
◽
Andreas Burg
◽
George Stamoulis
Keyword(s):
Memory Architecture
◽
Architecture Exploration
Download Full-text
Hardware Architecture Exploration for Deep Neural Networks
Arabian Journal for Science and Engineering
◽
10.1007/s13369-021-05455-4
◽
2021
◽
Author(s):
Wenqi Zheng
◽
Yangyi Zhao
◽
Yunfan Chen
◽
Jinhong Park
◽
Hyunchul Shin
Keyword(s):
Neural Networks
◽
Deep Neural Networks
◽
Hardware Architecture
◽
Architecture Exploration
Download Full-text
System-Level Specification and Architecture Exploration : an Avionics Codesign Application
Electronic Chips & Systems Design Languages
◽
10.1007/978-1-4757-3326-6_9
◽
2001
◽
pp. 111-120
Author(s):
François Cloute
◽
Jean-Noël Contensou
◽
Daniel Esteve
◽
Pascal Pampagnin
◽
Philippe Pons
◽
...
Keyword(s):
System Level
◽
Architecture Exploration
Download Full-text
The Guidelines and JPEG Encoder Study Case of System Level Architecture Exploration Using the SpecC Methodology
System on Chip Design Languages
◽
10.1007/978-1-4757-6674-5_13
◽
2002
◽
pp. 151-161
◽
Cited By ~ 1
Author(s):
Lukai Cai
◽
Mike Olivarez
◽
Dan Gajski
Keyword(s):
System Level
◽
Architecture Exploration
◽
Study Case
Download Full-text
Instruction-set architecture exploration strategies for deeply clustered VLIW ASIPs
2013 2nd Mediterranean Conference on Embedded Computing (MECO)
◽
10.1109/meco.2013.6601361
◽
2013
◽
Cited By ~ 7
Author(s):
Roel Jordans
◽
Rosilde Corvino
◽
Lech Jozwiak
◽
Henk Corporaal
Keyword(s):
Instruction Set
◽
Instruction Set Architecture
◽
Architecture Exploration
Download Full-text
Automated transistor sizing for FPGA architecture exploration
Proceedings of the 45th annual conference on Design automation - DAC '08
◽
10.1145/1391469.1391671
◽
2008
◽
Cited By ~ 11
Author(s):
Ian Kuon
◽
Jonathan Rose
Keyword(s):
Transistor Sizing
◽
Architecture Exploration
◽
Fpga Architecture
Download Full-text
A new coarse-grained FPGA architecture exploration environment
2008 International Conference on Field-Programmable Technology
◽
10.1109/fpt.2008.4762399
◽
2008
◽
Author(s):
Husain Parvez
◽
Zied Marrakchi
◽
Umer Farooq
◽
Habib Mehrez
Keyword(s):
Coarse Grained
◽
Architecture Exploration
◽
Fpga Architecture
◽
Exploration Environment
Download Full-text
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