Hardware Trust and Assurance through Reverse Engineering: A Tutorial and Outlook from Image Analysis and Machine Learning Perspectives

2021 ◽  
Vol 17 (4) ◽  
pp. 1-53
Author(s):  
Ulbert J. Botero ◽  
Ronald Wilson ◽  
Hangwei Lu ◽  
Mir Tanjidur Rahman ◽  
Mukhil A. Mallaiyan ◽  
...  

In the context of hardware trust and assurance, reverse engineering has been often considered as an illegal action. Generally speaking, reverse engineering aims to retrieve information from a product, i.e., integrated circuits (ICs) and printed circuit boards (PCBs) in hardware security-related scenarios, in the hope of understanding the functionality of the device and determining its constituent components. Hence, it can raise serious issues concerning Intellectual Property (IP) infringement, the (in)effectiveness of security-related measures, and even new opportunities for injecting hardware Trojans. Ironically, reverse engineering can enable IP owners to verify and validate the design. Nevertheless, this cannot be achieved without overcoming numerous obstacles that limit successful outcomes of the reverse engineering process. This article surveys these challenges from two complementary perspectives: image processing and machine learning. These two fields of study form a firm basis for the enhancement of efficiency and accuracy of reverse engineering processes for both PCBs and ICs. In summary, therefore, this article presents a roadmap indicating clearly the actions to be taken to fulfill hardware trust and assurance objectives.

Author(s):  
Mahaveer Penna ◽  
Shiva Shankar ◽  
Keshava Murthy ◽  
Jijesh J J

Background: The communication between two Integrated Circuits (IC) of the Printed Circuit Boards (PCB) currently happening through copper traces which allow electric charge to flow. Several limitations being encountered with the copper traces during high data rate communication because of the resistivity factors, which eventually leads to the damage of traces and the system. Methods: The solution for this issue comes with the design of surface wave communication-based waveguide/channel between the IC’s. Surface wave communication over a specified communication fabric/channel performs the propagation of electromagnetic waves effectively even at high frequencies compared to the copper traces using conductor-dielectric combination. This paper deals in revealing suitable conditions through profound analytical models for achieving effective surface wave communication between the pins of integrated circuits. Results: The analysis includes defining the possible wave propagation terms, suitable channel design aspects for PCB application and corresponding analysis for effective communication at frequencies from 50GHz to 500GHz of millimeter range. This study provides the roadmap to explore a deterministic channel/fabric for pin to pin communication between the IC’s as an alternate for the copper traces. Conclusion: In this process, the proposed channel achieves low dispersion compared to the copper traces at millimeter frequency range.


2020 ◽  
Vol 17 (3) ◽  
pp. 79-88
Author(s):  
Maarten Cauwe ◽  
Bart Vandevelde ◽  
Chinmay Nawghane ◽  
Marnix Van De Slyeke ◽  
Erwin Bosman ◽  
...  

Abstract High-density interconnect (HDI) printed circuit boards (PCBs) and associated assemblies are essential to allow space projects to benefit from the ever increasing complexity and functionality of modern integrated circuits such as field-programmable gate arrays, digital signal processors and application processors. Increasing demands for functionality translate into higher signal speeds combined with an increasing number of input/outputs (I/Os). To limit the overall package size, the contact pad pitch of the components is reduced. The combination of a high number of I/Os with a reduced pitch places additional demands onto the PCB, requiring the use of laser-drilled microvias, high-aspect ratio core vias, and small track width and spacing. Although the associated advanced manufacturing processes have been widely used in commercial, automotive, medical, and military applications, reconciling these advancements in capability with the reliability requirements for space remains a challenge. Two categories of the HDI technology are considered: two levels of staggered microvias (basic HDI) and (up to) three levels of stacked microvias (complex HDI). In this article, the qualification of the basic HDI technology in accordance with ECSS-Q-ST-70-60C is described. At 1.0-mm pitch, the technology passes all testing successfully. At .8-mm pitch, failures are encountered during interconnection stress testing and conductive anodic filament testing. These failures provide the basis for updating the design rules for HDI PCBs.


Author(s):  
A. De Luca Pennacchia ◽  
L. G. De la Fraga ◽  
U. Martí­nez Hernández

The progressive implementation of software functions in Integrated Circuits (ICs) has considerably increased the number of transistors and pin connections of ICs. For that reason, Printed Circuit Boards (PCBs) are fabricated with the Surface Mount Technology (SMT) nowadays and IC mounting on PCB is a crucial process that requires high precision. An Automatic Mechanical Montage (AMM) system is used to mount ICs on the sockets using a couple of reference points for every IC in order to find the correct positions for mounting the IC. Due to some factors in the process of PCB development, there are differences between designed and manufactured PCBs, which could generate delays in their production. In this work, a software tool which allows to work with digital images of PCBs is described. This tool finds the differences generated in PCB development, especially the differences in IC reference points using Digital Image Processing (DIP) techniques.


Author(s):  
Navid Asadizanjani ◽  
Sina Shahbazmohamadi ◽  
Mark Tehranipoor ◽  
Domenic Forte

Abstract Reverse engineering of electronics systems is performed for various reasons ranging from honest ones such as failure analysis, fault isolation, trustworthiness verification, obsolescence management, etc. to dishonest ones such as cloning, counterfeiting, identification of vulnerabilities, development of attacks, etc. Regardless of the goal, it is imperative that the research community understands the requirements, complexities, and limitations of reverse engineering. Until recently, the reverse engineering was considered as destructive, time consuming, and prohibitively expensive, thereby restricting its application to a few remote cases. However, the advents of advanced characterization and imaging tools and software have counteracted this point of view. In this paper, we show how X-ray micro-tomography imaging can be combined with advanced 3D image processing and analysis to facilitate the automation of reverse engineering, and thereby lowering the associated time and cost. In this paper, we demonstrate our proposed process on two different printed circuit boards (PCBs). The first PCB is a four-layer custom designed board while the latter is a more complex commercial system. Lessons learned from this effort can be used to both develop advanced countermeasures and establish a more efficient workflow for instances where reverse engineering is deemed necessary. Keywords: Printed circuit boards, non-destructive imaging, X-ray tomography, reverse engineering.


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