A hierarchical analog test bus framework for testing mixed-signal integrated circuits and printed circuit boards

1993 ◽  
Vol 4 (3) ◽  
pp. 261-268 ◽  
Author(s):  
Nai-Chi Lee
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Circuit Boards ◽  
Analog Test ◽  
Mixed Signal ◽  
Printed Circuit

Suitable Conditions for Effective Inter Chip Communication based on Surface Wave Phenomenon

2021 ◽  
Vol 14 ◽  
Author(s):  
Mahaveer Penna ◽  
Shiva Shankar ◽  
Keshava Murthy ◽  
Jijesh J J
Keyword(s):  
Surface Wave ◽  
Integrated Circuits ◽  
Electromagnetic Waves ◽  
Printed Circuit Boards ◽  
Analytical Models ◽  
Circuit Boards ◽  
High Frequencies ◽  
Printed Circuit ◽  
High Data ◽  
Low Dispersion

Background: The communication between two Integrated Circuits (IC) of the Printed Circuit Boards (PCB) currently happening through copper traces which allow electric charge to flow. Several limitations being encountered with the copper traces during high data rate communication because of the resistivity factors, which eventually leads to the damage of traces and the system. Methods: The solution for this issue comes with the design of surface wave communication-based waveguide/channel between the IC’s. Surface wave communication over a specified communication fabric/channel performs the propagation of electromagnetic waves effectively even at high frequencies compared to the copper traces using conductor-dielectric combination. This paper deals in revealing suitable conditions through profound analytical models for achieving effective surface wave communication between the pins of integrated circuits. Results: The analysis includes defining the possible wave propagation terms, suitable channel design aspects for PCB application and corresponding analysis for effective communication at frequencies from 50GHz to 500GHz of millimeter range. This study provides the roadmap to explore a deterministic channel/fabric for pin to pin communication between the IC’s as an alternate for the copper traces. Conclusion: In this process, the proposed channel achieves low dispersion compared to the copper traces at millimeter frequency range.

scholarly journals High-Density Interconnect Technology Assessment of Printed Circuit Boards for Space Applications

2020 ◽  
Vol 17 (3) ◽  
pp. 79-88
Author(s):  
Maarten Cauwe ◽  
Bart Vandevelde ◽  
Chinmay Nawghane ◽  
Marnix Van De Slyeke ◽  
Erwin Bosman ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Digital Signal ◽  
High Density ◽  
Circuit Boards ◽  
Space Applications ◽  
Track Width ◽  
Printed Circuit ◽  
Field Programmable ◽  
Space Projects

Abstract High-density interconnect (HDI) printed circuit boards (PCBs) and associated assemblies are essential to allow space projects to benefit from the ever increasing complexity and functionality of modern integrated circuits such as field-programmable gate arrays, digital signal processors and application processors. Increasing demands for functionality translate into higher signal speeds combined with an increasing number of input/outputs (I/Os). To limit the overall package size, the contact pad pitch of the components is reduced. The combination of a high number of I/Os with a reduced pitch places additional demands onto the PCB, requiring the use of laser-drilled microvias, high-aspect ratio core vias, and small track width and spacing. Although the associated advanced manufacturing processes have been widely used in commercial, automotive, medical, and military applications, reconciling these advancements in capability with the reliability requirements for space remains a challenge. Two categories of the HDI technology are considered: two levels of staggered microvias (basic HDI) and (up to) three levels of stacked microvias (complex HDI). In this article, the qualification of the basic HDI technology in accordance with ECSS-Q-ST-70-60C is described. At 1.0-mm pitch, the technology passes all testing successfully. At .8-mm pitch, failures are encountered during interconnection stress testing and conductive anodic filament testing. These failures provide the basis for updating the design rules for HDI PCBs.

scholarly journals A tool for errors detection in printed circuit boards production

2009 ◽  
Vol 7 (01) ◽  
Author(s):  
A. De Luca Pennacchia ◽  
L. G. De la Fraga ◽  
U. Martí­nez Hernández
Keyword(s):  
Image Processing ◽  
Integrated Circuits ◽  
Digital Image Processing ◽  
Digital Image ◽  
Printed Circuit Boards ◽  
Software Tool ◽  
Reference Points ◽  
Surface Mount Technology ◽  
Circuit Boards ◽  
Printed Circuit

The progressive implementation of software functions in Integrated Circuits (ICs) has considerably increased the number of transistors and pin connections of ICs. For that reason, Printed Circuit Boards (PCBs) are fabricated with the Surface Mount Technology (SMT) nowadays and IC mounting on PCB is a crucial process that requires high precision. An Automatic Mechanical Montage (AMM) system is used to mount ICs on the sockets using a couple of reference points for every IC in order to find the correct positions for mounting the IC. Due to some factors in the process of PCB development, there are differences between designed and manufactured PCBs, which could generate delays in their production. In this work, a software tool which allows to work with digital images of PCBs is described. This tool finds the differences generated in PCB development, especially the differences in IC reference points using Digital Image Processing (DIP) techniques.

EQUIVALENT DIPOLE MODEL FOR ESTIMATING THE NEAR FIELD OF RES STRUCTURES

2020 ◽  
pp. 102-106
Author(s):  
Т.С. Глотова ◽  
А.С. Иваницкий ◽  
В.В. Глотов
Keyword(s):  
Dipole Moment ◽  
Integrated Circuits ◽  
Integrated Circuit ◽  
Printed Circuit Boards ◽  
Dipole Moments ◽  
Near Field ◽  
International Standards ◽  
Sufficient Information ◽  
Circuit Boards ◽  
Printed Circuit

Электромагнитная совместимость интегральных микросхем становится все более важным аспектом в разработке высокоскоростных печатных плат. Международные стандарты были установлены для количественной и качественной оценки характеристик интегральных микросхем, а также помехоустойчивости с использованием различных методов измерения. Для решения задач, связанных с прогнозированием электромагнитных помех между интегральными микросхемами и печатными платами, необходимы модели интегральных микросхем как на внутриаппаратурном уровне, так и внутрисистемном. Такие модели могут быть получены из моделирования при наличии достаточной информации об интегральной микросхеме. Однако в большинстве практических случаев подробная информация об интегральных микросхемах может быть недоступна разработчикам радиоэлектронного оборудования. Предлагается улучшенная модель дипольного момента для анализа характеристик связи ближнего и дальнего электромагнитного поля от интегральной микросхемы, полученная на основе сканирования ближнего поля. Представлен массив электрических и магнитных дипольных моментов, используемых для воспроизведения распределений поля в плоскости сканирования над интегральной микросхемой. Полученные дипольные моменты могут использоваться в качестве источников излучений для интегральной микросхемы. Усовершенствованная модель дипольного момента особенно полезна для решения проблем радиочастотных помех, когда необходимо точно проанализировать шумовую связь в ближнем поле Electromagnetic compatibility of integrated circuits is becoming an increasingly important aspect in the design of high-speed printed circuit boards. International standards have been established to quantitatively and qualitatively assess the performance of integrated circuits as well as noise immunity using a variety of measurement methods. To solve problems associated with predicting electromagnetic interference between integrated microcircuits and printed circuit boards, models of integrated microcircuits are needed both at the in-hardware and in-system levels. Such models can be obtained from simulations if there is sufficient information about the integrated circuit. However, in most practical cases, detailed information on integrated circuits may not be available to avionics designers. An improved model of the dipole moment is proposed for analyzing the characteristics of the coupling of the near and far electromagnetic fields from an integrated circuit, obtained on the basis of scanning the near field. An array of electric and magnetic dipole moments is presented, used to reproduce the field distributions in the scanning plane above an integrated microcircuit. The obtained dipole moments can be used as sources of radiation for an integrated circuit. The advanced dipole moment model is especially useful for solving RFI problems when it is necessary to accurately analyze noise communications in the near field

Authentication of Printed Circuit Boards

2016 ◽  
Author(s):  
Anirudh Iyengar ◽  
Nareen Vobilisetti ◽  
Swaroop Ghosh
Keyword(s):  
Supply Chain ◽  
Integrated Circuits ◽  
Printed Circuit Boards ◽  
Hamming Distance ◽  
Process Variations ◽  
Circuit Boards ◽  
Printed Circuit ◽  
Manufacture Process ◽  
Multi Stage ◽  
Arbiter Puf

Abstract Printed Circuit Boards (PCBs) are easy target for reverse engineering and counterfeiting attacks due to the distributed supply chain. The integrated circuits (ICs) authentication techniques such as Physically Unclonable Function (PUF) are not easily extendible to PCBs. In this paper, we analyze various sources of variations in PCB and qualitatively study the quality metrics that can be used to quantify the PCB PUFs. We propose several flavors of PCB PUFs by exploiting the manufacture process variations. We also propose a multi-stage arbiter PUF with exponential challenge response pairs. Our preliminary simulations revealed an average 50.4% inter-PCB hamming distance.

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