How to reduce aliasing in linear analog testing

Author(s):  
Zhen Guo
Keyword(s):  
2010 ◽  
Author(s):  
Robert A. Fox ◽  
Frank Schowengerdt ◽  
Dale Boucher ◽  
Bill Larson ◽  
Lutz Richter

2014 ◽  
Vol 63 (9) ◽  
pp. 2145-2159 ◽  
Author(s):  
Shulin Tian ◽  
ChengLin Yang ◽  
Fang Chen ◽  
Zhen Liu

2014 ◽  
Vol 981 ◽  
pp. 3-10 ◽  
Author(s):  
Yuan Gao ◽  
Cheng Lin Yang ◽  
Shu Lin Tian

Soft fault diagnosis and tolerance are two challenging problems in linear analog circuit fault diagnosis. To solve these problems, a phasor analysis based fault modeling method and its theoretical proof are presented at first. Second, to form fault feature data base, the differential voltage phasor ratio (DVPR) is decomposed into real and imaginary parts. Optimal feature selection method and testability analysis method are used to determine the optimal fault feature data base. Statistical experiments prove that the proposed fault modeling method can improve the fault diagnosis robustness. Then, Multi-class support vector machine (SVM) classifiers are used for fault diagnosis. The effectiveness of the proposed approaches is verified by both simulated and experimental results.


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