Novel Design for Quantum Dots Cellular Automata to Obtain Fault-Tolerant Majority Gate

Quantum-dot Cellular Automata (QCA) is one of the most attractive technologies for computing at nanoscale. The principle element in QCA is majority gate. In this paper, fault-tolerance properties of the majority gate is analyzed. This component is suitable for designing fault-tolerant QCA circuits. We analyze fault-tolerance properties of three-input majority gate in terms of misalignment, missing, and dislocation cells. In order to verify the functionality of the proposed component some physical proofs using kink energy (the difference in electrostatic energy between the two polarization states) and computer simulations using QCA Designer tool are provided. Our results clearly demonstrate that the redundant version of the majority gate is more robust than the standard style for this gate.

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Design and Analysis of Fault-Tolerant 1:2 Demultiplexer Using Quantum-Dot Cellular Automata Nano-Technology

Electronics ◽

10.3390/electronics10212565 ◽

2021 ◽

Vol 10 (21) ◽

pp. 2565

Author(s):

Saeid Seyedi ◽

Nima Jafari Navimipour ◽

Akira Otsuki

Keyword(s):

Fault Tolerance ◽

Cellular Automata ◽

Quantum Dot ◽

Fault Tolerant ◽

Nano Technology ◽

Ultra Low Power ◽

Quantum Dot Cellular Automata ◽

Whole Process ◽

Dislocation Cells ◽

Rapid Switching

Quantum-dot Cellular Automata (QCA) is an innovative paradigm bringing hopeful applications in the perceptually novel computing layout in quantum electronics. The circuits manufactured by QCA technology can provide a notable decrease in size, rapid-switching velocity, and ultra-low power utilization. The demultiplexer is a beneficial component to optimize the whole process in any logical design, and therefore is very important in QCA. Moreover, fault-tolerant circuits can improve the reliability of digital circuits by redundancy. Hence, the present investigation illustrates a novel QCA-based fault-tolerant 1:2 demultiplexer construct that employs a two-input AND gate and inverter. The functionality of the suggested layout was executed and evaluated with the utilization of the QCADesigner 2.0.3 simulator. This paper utilizes cell redundancy on the wire, inverter, and AND gates for designing a fault-tolerant demultiplexer. Four components (i.e., missing cells, dislocation cells, extra cells, and misalignment) were analyzed by the QCADesigner simulator. The simulation results demonstrated that our proposed QCA-based fault-tolerant 1:2 demultiplexer acted more efficiently than prior constructs regarding delay and fault tolerance. The proposed fault-tolerant 1:2 demultiplexer could attain high fault-tolerance when single missing cell or extra cell faults exist in the QCA layout.

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Design of a New Multiplexer Structure Based on a New Fault-Tolerant Majority Gate in Quantum-Dot Cellular Automata

10.21203/rs.3.rs-355476/v1 ◽

2021 ◽

Author(s):

Yaser Rahmani ◽

Saeed Rasouli Heikalabad ◽

Mohammad Mosleh

Keyword(s):

Fault Tolerance ◽

Cellular Automata ◽

Quantum Dot ◽

High Performance ◽

Fault Tolerant ◽

Cmos Technology ◽

Good Alternative ◽

Majority Gate ◽

Power Efficient ◽

Quantum Dot Cellular Automata

Abstract Quantum-dot Cellular Automata (QCA) technology is believed to be a good alternative to CMOS technology. This nanoscale technology can provide a platform for design and implementation of high performance and power efficient logic circuits. However, the fabrication of QCA circuits is susceptible to faults appearing in this form of missing cells, additional cells, rotated cells, and displaced cells. Over the years, several solutions have been proposed to address these problems. This paper presents a new solution for improving the fault tolerance of three input majority gate. The proposed majority gate is then used to design 2-1 multiplexer and 4-1 multiplexer. The proposed designs are implemented in QCA Designer. Simulation results demonstrate significant improvements in terms of fault tolerance and area requirement.

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