scholarly journals High-speed optical 3D sensing and its applications

2016 ◽  
Vol 5 (5-6) ◽  
Author(s):  
Yoshihiro Watanabe

AbstractThis paper reviews high-speed optical 3D sensing technologies for obtaining the 3D shape of a target using a camera. The focusing speed is from 100 to 1000 fps, exceeding normal camera frame rates, which are typically 30 fps. In particular, contactless, active, and real-time systems are introduced. Also, three example applications of this type of sensing technology are introduced, including surface reconstruction from time-sequential depth images, high-speed 3D user interaction, and high-speed digital archiving.

Author(s):  
Witold Kinser ◽  
Dario Schor ◽  
Ken Beigun

Teaching undergraduate students about interfacing of microprocessors and microcontrollers in real-time systems is challenging because the circuits have moved from medium to increasingly higher frequencies (multimega- and giga hertz), while wired interfacing has been augmented with wireless interfacing. This paper describes an attempt to accommodate the changes in an undergraduate course called Microprocessor Interfacing (µI) that has been offered at the University of Manitoba for many years now [1-4].The course presents real-time wired and wireless interfacing of microcontrollers, microprocessors, and microcomputers to the external world, including interfacing of input/output (I/O) devices with minimum hardware and software, as well as data acquisition with and without microprocessors, data communications, transmission and logging with embedded computers. The following topics are covered: (i) introduction on computing, architectures, processors, and technologies, (ii) architecture and organization of small computer buses, and synchronization of data transfers on local buses (iii) digital input and output (I/O), (iv) digital-to-analog (D/A) and analog-to-digital (A/D) signal conversions and converters, (v) and interfacing aspects in data communications, including encoding, modulation, error detection and forward error protection. The course also includes (a) demonstrations of bus architectures, modules, systems, and new devices, as well as (b) updates on new concepts, technologies, protocols, and software. The laboratories are innovative in terms of three levels of complexity: the Tier1 level includes five 3-hour standard labs designed for all students, the Tier2 is designed for more experienced students, and the Tier3 level lab is designed as a project for groups of students with demonstrated prior design and implementation experience [3].Tomorrow’s teaching will require a deeper exposure to high-speed circuits, as the impact of the distributed nature of signals in circuits increases due to the circuit interconnections acting as transmission lines. This requires software-based simulation and emulation of designs. Embedded systems on a chip may mitigate the problem to a degree. Course laboratories may also change because of the inexpensive equipment such as logic analyzers, protocol analyzers [5], and computer-based digital oscilloscopes. Since the test cost of such equipment is within a range of a student, laboratories-athome may also become a reality.The paper provides a description of a class structure of an interfacing course today, and identifies changes required by future material in such as course. An example of an implementation of a change is also provided.


IEE Review ◽  
1992 ◽  
Vol 38 (3) ◽  
pp. 112
Author(s):  
Stuart Bennett

Author(s):  
Pallab Banerjee ◽  
◽  
Riya Shree ◽  
Richa Kumari Verma ◽  
◽  
...  

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