Two-Dimensional Optical CDMA System Parameters Limitations for Wavelength Hopping/Time-Spreading Scheme based on Simulation Experiment

2018 ◽  
Vol 39 (2) ◽  
pp. 223-229
Author(s):  
Chahinaz Kandouci ◽  
Ali Djebbari

AbstractA new family of two-dimensional optical hybrid code which employs zero cross-correlation (ZCC) codes, constructed by the balanced incomplete block design BIBD, as both time-spreading and wavelength hopping patterns are used in this paper. The obtained codes have both off-peak autocorrelation and cross-correlation values respectively equal to zero and unity. The work in this paper is a computer experiment performed using Optisystem 9.0 software program as a simulator to determine the wavelength hopping/time spreading (WH/TS) OCDMA system performances limitations. Five system parameters were considered in this work: the optical fiber length (transmission distance), the bitrate, the chip spacing and the transmitted power. This paper shows for what sufficient system performance parameters (BER≤10−9, Q≥6) the system can stand for.

2016 ◽  
Vol 2016 ◽  
pp. 1-9
Author(s):  
Bih-Chyun Yeh

We propose a new family of one-dimensional (1D) active weight two-code keying (TCK) in spectral amplitude coding (SAC) optical code division multiple access (OCDMA) networks. We use encoding and decoding transfer functions to operate the 1D active weight TCK. The proposed structure includes an optical line terminal (OLT) and optical network units (ONUs) to produce the encoding and decoding codes of the proposed OLT and ONUs, respectively. The proposed ONU uses the modified cross-correlation to remove interferences from other simultaneous users, that is, the multiuser interference (MUI). When the phase-induced intensity noise (PIIN) is the most important noise, the modified cross-correlation suppresses the PIIN. In the numerical results, we find that the bit error rate (BER) for the proposed system using the 1D active weight TCK codes outperforms that for two other systems using the 1D M-Seq codes and 1D balanced incomplete block design (BIBD) codes. The effective source power for the proposed system can achieve −10 dBm, which has less power than that for the other systems.


Optik ◽  
2009 ◽  
Vol 120 (18) ◽  
pp. 959-962 ◽  
Author(s):  
Jaswinder Singh ◽  
Maninder Lal Singh

2005 ◽  
Author(s):  
Jianhua Ji ◽  
Ming Xu ◽  
Shuwen Yang ◽  
Zhipeng Zhang ◽  
Ke Wang

1971 ◽  
Vol 4 (1) ◽  
pp. 41-49 ◽  
Author(s):  
W. D. Wallis

Suppose there exist a balanced incomplete block design with λ = 1 and an affine resolvable balanced incomplete block design, the two designs having the same replication number. Combining these designs we construct two strongly regular graphs. This is applied to give a new family of design graphs ((v, k, λ)-graphs). Finally, we show that for any prime power n there are two non-isomorphic design graphs with v = n2(n+2), k = n(n+1) and λ = n.


2017 ◽  
Author(s):  
Varun Bheemireddy

The two-dimensional(2D) materials are highly promising candidates to realise elegant and e cient transistor. In the present letter, we conjecture a novel co-planar metal-insulator-semiconductor(MIS) device(capacitor) completely based on lateral 2D materials architecture and perform numerical study of the capacitor with a particular emphasis on its di erences with the conventional 3D MIS electrostatics. The space-charge density features a long charge-tail extending into the bulk of the semiconductor as opposed to the rapid decay in 3D capacitor. Equivalently, total space-charge and semiconductor capacitance densities are atleast an order of magnitude more in 2D semiconductor. In contrast to the bulk capacitor, expansion of maximum depletion width in 2D semiconductor is observed with increasing doping concentration due to lower electrostatic screening. The heuristic approach of performance analysis(2D vs 3D) for digital-logic transistor suggest higher ON-OFF current ratio in the long-channel limit even without third dimension and considerable room to maximise the performance of short-channel transistor. The present results could potentially trigger the exploration of new family of co-planar at transistors that could play a signi significant role in the future low-power and/or high performance electronics.<br>


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