Improving CPU Performance and Equalizing Power Consumption for Multicore Processors in Agent Based Process Scheduling

In any heterogeneous multicore system, there are numerous amount of processors with different platform and all the processing units are fabricated on a common single unit preferably on a System on Chip. As there is a tremendous amount of parallelism encompassed in a multicore system, proper utilization of the cores is a big challenge in the current era. Hence a more automated software approach is required like an agent based graph coloring algorithm to find the free processor and schedule the tasks on the respective cores. Predominantly the entire process of scheduling the tasks on multicore system is based on arrival time of process. This paper incorporates the scheduling on the linux 2.6.11 kernel and GEMS simulator for multicore implementation. The core utilization in this type of agent scheduling is 50% more than the existing scheduling mechanism

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Dynamic process scheduling and resource allocation in distributed environment: an agent-based modelling and simulation

Mathematical and Computer Modelling of Dynamical Systems ◽

10.1080/13873954.2018.1512504 ◽

2018 ◽

Vol 24 (5) ◽

pp. 505-525 ◽

Cited By ~ 1

Author(s):

Poulami Dalapati ◽

Piyush Agarwal ◽

Animesh Dutta ◽

Swapan Bhattacharya

Keyword(s):

Resource Allocation ◽

Dynamic Process ◽

Modelling And Simulation ◽

Process Scheduling ◽

Distributed Environment ◽

Agent Based ◽

Agent Based Modelling

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Energy Efficient Scheduling Algorithm for Soft Real Time System with High Deadline Meeting Rate on Overload

Applied Mechanics and Materials ◽

10.4028/www.scientific.net/amm.699.840 ◽

2014 ◽

Vol 699 ◽

pp. 840-845

Author(s):

Zahereel Ishwar Abdul Khalib ◽

R. Badlishah Ahmad ◽

Ong Bi Lynn

Keyword(s):

Power Consumption ◽

Real Time ◽

Scheduling Algorithm ◽

Simulation Method ◽

Process Scheduling ◽

Time System ◽

Real Time System ◽

System Load ◽

Percent Improvement ◽

Earliest Deadline

The fact that earliest deadline first (EDF) scheduling algorithm behaves unpredictably during overload is an old and existing issue in the field of real time system. In this paper, a new software process scheduling algorithm for soft real time applications is presented. The algorithm is formulated by means of logical reasoning and excessive simulation method. This method is adopted due to the fact that the problem of scheduling a set of periodic task on single processor using non-preemptive scheme is NP-hard in the strong sense. The new algorithm, with inherently less computational complexity is found to improve in power consumption by almost 50 percent at the peak of practical overload which is at 150 percent of system load. At the same system load, the new algorithm also gives a minimum of 16 percent improvement in deadline meeting rate (DMTR) as compared to EDF. Design and formulation of the new algorithm along with graphical results of the power consumption level and the level of the deadline meeting rate of both algorithms will be presented and discuss in detail.

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Implementation of High Performance EEG Based Seizure Detection And Analysis On Multicore Platform

International Journal of Engineering Technology and Management Sciences ◽

10.46647/ijetms.2020.v04i05.002 ◽

2020 ◽

Vol 4 (5) ◽

pp. 5-9

Author(s):

NAGASHYAM P ◽

VIJAY KUMAR T

Keyword(s):

Power Consumption ◽

High Performance ◽

Detection System ◽

Multicore Processors ◽

Seizure Detection ◽

Extraction Process ◽

Process Data ◽

Detection Algorithms ◽

Eeg Data ◽

Two Stages

About 50 million people worldwide suﬀer from epilepsy, the neurological disorder characterized by seizures. The primary tool for diagnosis of an epileptic seizure is an electroencephalography (EEG) which records the brain’s spontaneous electrical activity. This requires the placement of a minimum of 16 electrodes on the scalp with each electrode being interpreted as a channel. The classification of seizure detection and analysis techniques mainly work in two stages, where features are extracted from raw EEG data in the first stage and then the obtained features are used as input for the classification process in the second stage. Traditionally the Seizure detection algorithms were implemented using DSP Processor or FPGAs. But these single core platforms are constrained with respect to speed of operation and power consumption. There is a greater need to reduce the power consumption as well to increase the speed of EEG seizure detection system. This problem can be addressed using the Multicore Processors, which process data simultaneously. This project presents a high performance multicore platform for EEG based seizure detection and analysis. This platform performs continuous multichannel detection and analysis of seizures for epilepsy patients. The detection unit will detect the seizures based on feature extraction process once the seizure detection is done enables the analysis circuit that process the data based Uridva Triyabhakyam based 128 point FFT and transmits energy and frequency contents of EEG data. All proposed blocks are simulated and synthesized using Xilinx ISE and coding is done in Verilog.

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