scholarly journals Two Mode - (De)muxer Based on a Symmetric Y Junction Coupler, a \(2\times 2\) MMI Coupler and a Ridge Phase Shifter Using Silicon Waveguides for WDM Applications

2017 ◽  
Vol 27 (4) ◽  
pp. 327 ◽  
Author(s):  
Dung Cao Truong ◽  
Dao Anh Vu ◽  
Chung Vu Hoang

In this paper, we introduce a new two-mode (de)multiplexer based on the silicon-on-insulator (SOI) platform. The device is built on a symmetric Y-junction, a 2×2 multimode interference (MMI) waveguide and a phaseshifter in the form of a ridge waveguide which is designed using 3D scalar beam propagation method (BPM). The phase evolution in the structure is discussed in details. Simulation results show that the device can operate in a wide wavelength range (150 nm) with a low insertion loss and small crosstalk. Large fabrication tolerance to the width of the input waveguide up to 100 nm is achieved, which is compatible to the current CMOS manufacturing technologies for the photonic integrated circuits. Furthermore, the small footprint (4µm×286µm) makes the device suitable for applications in high bitrate and compact on-chip silicon photonic integrated circuits.

Author(s):  
W. Bogaerts ◽  
S.K. Selvaraja ◽  
P. Dumon ◽  
P. Absil ◽  
D. Van Thourhout ◽  
...  

Author(s):  
Marcus S. Dahlem ◽  
Milos A. Popovic ◽  
Charles W. Holzwarth ◽  
Anatol Khilo ◽  
Tymon Barwicz ◽  
...  

2012 ◽  
Vol 101 (7) ◽  
pp. 071114 ◽  
Author(s):  
Xiang Guo ◽  
Chang-Ling Zou ◽  
Xi-Feng Ren ◽  
Fang-Wen Sun ◽  
Guang-Can Guo

2018 ◽  
Vol 24 (1) ◽  
pp. 1-20 ◽  
Author(s):  
Fred Kish ◽  
Vikrant Lal ◽  
Peter Evans ◽  
Scott W. Corzine ◽  
Mehrdad Ziari ◽  
...  

Author(s):  
G. Roelkens ◽  
L. Liu ◽  
J. Van Campenhout ◽  
J. Brouckaert ◽  
D. Van Thourhout ◽  
...  

2009 ◽  
Vol 1 (4) ◽  
pp. 347-352
Author(s):  
Ahmet Oncu ◽  
Chiaki Inui ◽  
Yasuo Manzawa ◽  
Minoru Fujishima

In millimeter-wave CMOS circuits, a balun is useful for connecting off-chip single-end devices and on-chip differential circuits to improve noise immunity. However, an on-chip balun occupies a large chip area. To reduce the chip area required for the on-chip balun, a new rat-race balun using a rewiring technology with a wafer-level chip-size package (W-CSP) is proposed. The W-CSP balun occupies no area in a die because it is placed over integrated circuits. In the proposed balun, an S-shaped structure is adopted in order to directly connect the balun to differential GSGSG pads on a chip with a small area. The S-shaped W-CSP balun was fabricated on a silicon-on-insulator (SOI) substrate. The core area of the S-shaped rat-race balun is 480×735 µm, which is 22.4% that of a square rat-race balun. As a result of measurement, we found that the minimum insertion loss is 1.4 dB and the operating frequency ranges from 40 to 61 GHz.


2019 ◽  
Vol 37 (5) ◽  
pp. 1474-1483 ◽  
Author(s):  
Mitsuru Takenaka ◽  
Shigeki Takahashi ◽  
Shinichi Takagi ◽  
Jae-Hoon Han ◽  
Frederic Boeuf ◽  
...  

2004 ◽  
Vol 12 (8) ◽  
pp. 1583 ◽  
Author(s):  
W. Bogaerts ◽  
D. Taillaert ◽  
B. Luyssaert ◽  
P. Dumon ◽  
J. Van Campenhout ◽  
...  

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